5 Gb/s Optical Receiver Analog Front-end Circuit Design
文献类型：会议论文
| 作者 | Liu Shuaifeng; Li Lei; Liang Yuanjun; Zhu Wenlong |
| 出版日期 | 2009 |
| 会议名称 | International Workshop on Information Security and Application (IWISA 2009) |
| 英文摘要 | An optical receiver analog front-end circuit is implemented in SMIC 0.18um Mixed-signal process. The circuit provided an overall gain of 85dB with a bandwidth of 4.36 GHz while drawing 150mW from a 1.8 V supply. A 2.5 V supply is used which only offers a voltage potential. The chip area is only 1.0*0.7mm(2), including the pads. Some improvements aiming at boosting the circuit performance are also presented. |
| 收录类别 | ISTP |
| 语种 | 英语 |
| 源URL | [http://ir.siat.ac.cn:8080/handle/172644/2510]  |
| 专题 | 深圳先进技术研究院_集成所 |
| 作者单位 | 2009 |
| 推荐引用方式 GB/T 7714 | Liu Shuaifeng,Li Lei,Liang Yuanjun,et al. 5 Gb/s Optical Receiver Analog Front-end Circuit Design[C]. 见:International Workshop on Information Security and Application (IWISA 2009). |
入库方式： OAI收割
来源：深圳先进技术研究院
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