中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip

文献类型:期刊论文

作者Wang, Xiao-Hang; Liu, Peng; Yang, Mei; Palesi, Maurizio; Jiang, Ying-Tao; Huang, Michael C.
刊名JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
出版日期2013
英文摘要3-D Networks-on-Chip (NoC) emerge as a potent solution to address both the interconnection and design complexity problems facing future Multiprocessor System-on-Chips (MPSoCs). Effective run-time mapping on such 3-D NoC-based MPSoCs can be quite challenging, as the arrival order and task graphs of the target applications are typically not known a priori, which can be further complicated by stringent energy requirements for NoC systems. This paper thus presents an energy-aware run-time incremental mapping algorithm (ERIM) for 3-D NoC which can minimize the energy consumption due to the data communications among processor cores, while reducing the fragmentation effect on the incoming applications to be mapped, and simultaneously satisfying the thermal constraints imposed on each incoming application. Specifically, incoming applications are mapped to cuboid tile regions for lower energyconsumption of communication and the minimal routing. Fragment tiles due to system fragmentation can be gleaned for better resource utilization. Extensive experiments have been conducted to evaluate the performance of the proposed algorithm ERIM, and the results are compared against the optimal mappingalgorithm (branch-and-bound) and two heuristic algorithms (TB and TL). The experiments show that ERIM outperforms TB and TL methods with significantenergy saving (more than 10%), much reduced average response time, and improved system utilization.
收录类别SCI
原文出处http://link.springer.com/article/10.1007%2Fs11390-013-1312-x
语种英语
源URL[http://ir.siat.ac.cn:8080/handle/172644/5291]  
专题深圳先进技术研究院_南沙所
作者单位JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
推荐引用方式
GB/T 7714
Wang, Xiao-Hang,Liu, Peng,Yang, Mei,et al. Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2013.
APA Wang, Xiao-Hang,Liu, Peng,Yang, Mei,Palesi, Maurizio,Jiang, Ying-Tao,&Huang, Michael C..(2013).Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY.
MLA Wang, Xiao-Hang,et al."Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY (2013).

入库方式: OAI收割

来源:深圳先进技术研究院

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