A imaging system of area-Array CCD cameras based on FPGA was designed. The overall structure and design of the system was introduced in detail. According to the working mode and driving timing requirements of this CCD image sensor, the driving schedule under the control of FPGA was designed. The working mode and parameters of such an imaging system were aligned with the control signals in accordance with the general requirements of space CCD cameras. With FPGA device as the platform of hardware design, the hardware of integrated timing and control system was described in VHDL language. The A/D converter AD9945 based on the correlated double sampling was used to realize the analog-digital (A/D) conversion of ICX285AL output signals. The XQR2V3000-4CG717V developed by Xilinx was chosen to accomplish the design of this hardware circuit. Through simulation, the correctness of driving schedule was verified, thus preparing necessary hardware for the final development of space area-Array CCD cameras with high performance. © 2017 SPIE.