module placement with boundary constraints using o-tree representation
文献类型：会议论文
| 作者 | Liu R ; Hong XL ; Dong SQ ; Cai YC ; Gu J ; Cheng CK |
| 出版日期 | 2002 |
| 会议名称 | IEEE International Symposium on Circuits and Systems |
| 会议日期 | MAY 26-29, |
| 会议地点 | PHOENIX, AZ |
| 关键词 | I/O pad connection O-tree representation VLSI physical design boundary constraints chip boundary placement layout generation linear computation effort module placement polynomial methods simulated annealing based algorithm circuit optimisation |
| 页码 | 871-874 |
| 英文摘要 | The O-tree representation needs linear computation effort to generate a corresponding layout, and exhibits a smaller upper bound of possible configurations. This paper addresses the problem of handling boundary constraints in the context of O- |
| 收录类别 | ISTP ; IEEE |
| 会议主办者 | IEEE, IEEE Circuits & Syst Soc |
| 会议录出版者 | 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS |
| 会议录出版地 | 345 E 47TH ST, NEW YORK, NY 10017 USA |
| 语种 | 英语 |
| ISBN号 | 0-7803-7448-7 |
| 源URL | [http://124.16.136.157/handle/311060/13390]  |
| 专题 | 软件研究所_软件所图书馆_会议论文 |
| 推荐引用方式 GB/T 7714 | Liu R,Hong XL,Dong SQ,et al. module placement with boundary constraints using o-tree representation[C]. 见:IEEE International Symposium on Circuits and Systems. PHOENIX, AZ. MAY 26-29,. |
入库方式： OAI收割
来源：软件研究所
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