algorithm for communication synchronization on reconfigurable processor arrays with faults
文献类型:会议论文
作者 | Wu Jigang ; Jiang Guiyuan ; Zhang Yuanrui ; Zhu Yuanbo |
出版日期 | 2012 |
会议名称 | 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 |
会议日期 | May 21, 2012 - May 25, 2012 |
会议地点 | Shanghai, China |
关键词 | Algorithms Communication Distributed parameter networks Fault tolerance |
页码 | 266-270 |
中文摘要 | Efficient fault tolerant techniques for reconfigurable multiprocessor array have been extensively studied to construct maximum target array from host array with faulty processors. Existing work focused on the reconfiguration algorithm without considering the communication synchronization of the target array. This paper proposes an algorithm to rearrange the long interconnects of the target array, in order to improve the communication performance in synchronization. In addition, divide and conquer strategy is utilized for deleting logical rows to form a high performance target array with given size. Experimental results show that the proposed algorithm achieves considerable improvement on communication performance in synchronization for the case of small fault rate which is often occurred in real applications. © 2012 IEEE. |
英文摘要 | Efficient fault tolerant techniques for reconfigurable multiprocessor array have been extensively studied to construct maximum target array from host array with faulty processors. Existing work focused on the reconfiguration algorithm without considering the communication synchronization of the target array. This paper proposes an algorithm to rearrange the long interconnects of the target array, in order to improve the communication performance in synchronization. In addition, divide and conquer strategy is utilized for deleting logical rows to form a high performance target array with given size. Experimental results show that the proposed algorithm achieves considerable improvement on communication performance in synchronization for the case of small fault rate which is often occurred in real applications. © 2012 IEEE. |
收录类别 | EI |
会议主办者 | IEEE Computer Society Technical Committee on Parallel Processing |
会议录 | Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012
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语种 | 英语 |
ISBN号 | 9780769546766 |
源URL | [http://ir.iscas.ac.cn/handle/311060/15769] ![]() |
专题 | 软件研究所_软件所图书馆_会议论文 |
推荐引用方式 GB/T 7714 | Wu Jigang,Jiang Guiyuan,Zhang Yuanrui,et al. algorithm for communication synchronization on reconfigurable processor arrays with faults[C]. 见:2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012. Shanghai, China. May 21, 2012 - May 25, 2012. |
入库方式: OAI收割
来源:软件研究所
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