memristors for neural branch prediction: a case study in strict latency and write endurance challenges
文献类型：会议论文
| 作者 | Saadeldeen Hebatallah ; Franklin Diana ; Long Guoping ; Hill Charlotte ; Browne Aisha ; Strukov Dmitri ; Sherwood Timothy ; Chong Frederic T. |
| 出版日期 | 2013 |
| 会议名称 | 2013 ACM International Conference on Computing Frontiers, CF 2013 |
| 会议日期 | May 14, 2013 - May 16, 2013 |
| 会议地点 | Ischia, Italy |
| 关键词 | Analog computers Hybrid systems Memristors Neural networks Passive filters Reliability Static random access storage |
| 页码 | - |
| 中文摘要 | Memristors offer many potential advantages over more traditional memory-cell technologies, including the potential for extreme densities, and fast read times. Current devices, however, are plagued by problems of yield, and durability. We present a limit study of an aggressive neural network application that has a high update rate and a strict latency requirement, analog neural branch predictor. Of course, traditional analog neural network (ANN) implementations of branch predictors are not built with the idea that the underlying bits are likely to fail due to both manufacturing and wear-out issues. Without some careful precautions, a direct one-to-one replacement will result in poor behavior. We propose a hybrid system that uses SRAM front-end cache, and a distributed-sum scheme to overcome memristors' limitations. Our design can leverage devices with even modest durability (surviving only hours of continuous switching) to provide a system lasting 5 or more years of continuous operation. In addition, these schemes allow for a fault-tolerant design as well. We find that, while a neural predictor benefits from larger density, current technology parameters do not allow high dense, energy-efficient design. Thus, we discuss a range of plausible memristor characteristics that would; as the technology advances; make them practical for our application. Copyright 2013 ACM. |
| 英文摘要 | Memristors offer many potential advantages over more traditional memory-cell technologies, including the potential for extreme densities, and fast read times. Current devices, however, are plagued by problems of yield, and durability. We present a limit study of an aggressive neural network application that has a high update rate and a strict latency requirement, analog neural branch predictor. Of course, traditional analog neural network (ANN) implementations of branch predictors are not built with the idea that the underlying bits are likely to fail due to both manufacturing and wear-out issues. Without some careful precautions, a direct one-to-one replacement will result in poor behavior. We propose a hybrid system that uses SRAM front-end cache, and a distributed-sum scheme to overcome memristors' limitations. Our design can leverage devices with even modest durability (surviving only hours of continuous switching) to provide a system lasting 5 or more years of continuous operation. In addition, these schemes allow for a fault-tolerant design as well. We find that, while a neural predictor benefits from larger density, current technology parameters do not allow high dense, energy-efficient design. Thus, we discuss a range of plausible memristor characteristics that would; as the technology advances; make them practical for our application. Copyright 2013 ACM. |
| 收录类别 | EI |
| 会议主办者 | ACM SIGMICRO |
| 会议录 | Proceedings of the ACM International Conference on Computing Frontiers, CF 2013
 |
| 语种 | 英语 |
| ISBN号 | 9781450320535 |
| 源URL | [http://ir.iscas.ac.cn/handle/311060/15973]  |
| 专题 | 软件研究所_软件所图书馆_会议论文 |
| 推荐引用方式 GB/T 7714 | Saadeldeen Hebatallah,Franklin Diana,Long Guoping,et al. memristors for neural branch prediction: a case study in strict latency and write endurance challenges[C]. 见:2013 ACM International Conference on Computing Frontiers, CF 2013. Ischia, Italy. May 14, 2013 - May 16, 2013. |
入库方式： OAI收割
来源：软件研究所
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