A bypass-based low latency network-on-chip router
文献类型：期刊论文
| 作者 | Guo, Peng1,2 ; Liu, Qingbin1,2; Chen, Ruizhi1,2; Yang, Lei1; Wang, Donglin1
|
| 刊名 | IEICE ELECTRONICS EXPRESS
 |
| 出版日期 | 2019-02-25 |
| 卷号 | 16期号:4页码:12 |
| 关键词 | network-on-chip router bypass low latency |
| ISSN号 | 1349-2543 |
| DOI | 10.1587/elex.16.20181147 |
| 通讯作者 | Guo, Peng(iagp1991@163.com) |
| 英文摘要 | As the most critical components of Network on chip (NoC), the routers need to select suitable output ports and guarantee every flit accesses the hardware resource exclusively. Thus they are normally designed with several pipelines. However, most flits don't compete for the same output port with other flits in real applications. In this work, we introduce a bypass path to the traditional router thus the non-conflict flits can be forwarded directly. Combined with several other optimizations, we propose a bypass-based low latency NoC router (BNR). When no congestion occurs, BNR can transfer the flit through the bypass path with only one cycle. Otherwise, the flits are transferred through the conventional path with two hops. Besides, we also present a simplified version, BNR-S. Compared with BNR, it only bypasses the short packets and will reduce the area overhead significantly. For the synthetic traffic with different injection rate, BNR achieves 1.48x and 1.31x speedup than the two baselines while BNR-S achieves 1.3x and 1.15x. They also bring obvious benefits for several real applications. In addition, the experiments also illustrate that the proposed bypass mechanism can reduce dynamic power. |
| WOS研究方向 | Engineering |
| 语种 | 英语 |
| WOS记录号 | WOS:000462020400011 |
| 出版者 | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG |
| 源URL | [http://ir.ia.ac.cn/handle/173211/23471]  |
| 专题 | 自动化研究所_国家专用集成电路设计工程技术研究中心 |
| 通讯作者 | Guo, Peng |
| 作者单位 | 1.Chinese Acad Sci, Inst Automat, Beijing, Peoples R China 2.Univ Chinese Acad Sci, Beijing, Peoples R China |
| 推荐引用方式 GB/T 7714 | Guo, Peng,Liu, Qingbin,Chen, Ruizhi,et al. A bypass-based low latency network-on-chip router[J]. IEICE ELECTRONICS EXPRESS,2019,16(4):12. |
| APA | Guo, Peng,Liu, Qingbin,Chen, Ruizhi,Yang, Lei,&Wang, Donglin.(2019).A bypass-based low latency network-on-chip router.IEICE ELECTRONICS EXPRESS,16(4),12. |
| MLA | Guo, Peng,et al."A bypass-based low latency network-on-chip router".IEICE ELECTRONICS EXPRESS 16.4(2019):12. |
入库方式： OAI收割
来源：自动化研究所
浏览0
下载0
收藏0
其他版本
除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。