Efficient WCDMA Digital Down Converter Design Using System Generator
文献类型:会议论文
作者 | Lin Fei-yu1,2; Qia Wei-ming1; Wang Yan-yu1![]() |
出版日期 | 2009 |
关键词 | Digital Down Converter (DDC) Field-programmable Gate Array (FPGA) Wideband Code Division Multiple Access (WCDMA) Xilinx System Generator |
页码 | 89-+ |
英文摘要 | In this paper, the design and implementation of the digital up converter (DUC) on Xilinx FPGA for WCDMA is presented. A powerful system level design tool, Xilinx System Generator, is adopted to shorten the design cycle and increase the design productivity. The proposed DDC includes DDS, mixer and three cascaded stages of filters. Using Vitex-5 DSP48E slices, the maximum operation speed of the complex multiplier reaches 368.64MHz. The DDS submodule is designed and produced by Xilinx DDS Compiler. The remaining submodules of the DDC,such as the RRC filter and the half-band filters, are co-designed using MATLAB FDATool and Xilinx FIR Compiler with considerations of tradeoff between receive path requirements of WCDMA, algorithm and hardware implementation complexity. We have successfully verified the system generator module of the DDC using the MATLAB module of it. Finally, the DDC is implemented on Xilinx XC5VSX50T FPGA device. And its performance and costs are also addressed. |
会议录 | 2009 INTERNATIONAL CONFERENCE ON SPACE SCIENCE AND COMMUNICATION
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会议录出版者 | IEEE |
会议录出版地 | 345 E 47TH ST, NEW YORK, NY 10017 USA |
语种 | 英语 |
WOS研究方向 | Astronomy & Astrophysics ; Computer Science ; Engineering ; Telecommunications |
WOS记录号 | WOS:000277251100019 |
源URL | [http://119.78.100.186/handle/113462/57675] ![]() |
专题 | 中国科学院近代物理研究所 |
通讯作者 | Lin Fei-yu |
作者单位 | 1.Chinese Acad Sci, Inst Modern Phys, Lanzhou, Peoples R China 2.Chinese Acad Sci, Grad Sch, Beijing, Peoples R China 3.Chinese Acad Sci, Natl Astron Observ, Beijing, Peoples R China |
推荐引用方式 GB/T 7714 | Lin Fei-yu,Qia Wei-ming,Wang Yan-yu,et al. Efficient WCDMA Digital Down Converter Design Using System Generator[C]. 见:. |
入库方式: OAI收割
来源:近代物理研究所
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