Parallel Error Detection for Leading Zero Anticipation
文献类型：期刊论文
| 作者 | Zi-Chu Qi（齐子初）; Ge Zhang（张戈）; Wei-Wu Hu（胡伟武） |
| 刊名 | Journal of Computer Science and Technology
 |
| 出版日期 | 2006 |
| 卷号 | 21期号:6页码:901-906 |
| 关键词 | Computer Arithmetic Floating-point Addition Leading Zero Anticipation |
| 英文摘要 | The algorithm and its implementation of the leading zero anticipation (LZA) are very vital for the performance of a high-speed floating-point adder in today's state of art microprocessor design. Unfortunately, in predicting "shift amount" by a conventional LZA design, the result could be off by one position. This paper presents a novel parallel error detection algorithm for a general-case LZA. The proposed approach enables parallel execution of conventional LZA and its error detection, so that the error-indication signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. The circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work. |
| 语种 | 英语 |
| 公开日期 | 2010-11-04 |
| 源URL | [http://ictir.ict.ac.cn/handle/311040/844]  |
| 专题 | 中国科学院计算技术研究所期刊论文_2006年英文 |
| 推荐引用方式 GB/T 7714 | Zi-Chu Qi,Ge Zhang,Wei-Wu Hu. Parallel Error Detection for Leading Zero Anticipation[J]. Journal of Computer Science and Technology,2006,21(6):901-906. |
| APA | Zi-Chu Qi,Ge Zhang,&Wei-Wu Hu.(2006).Parallel Error Detection for Leading Zero Anticipation.Journal of Computer Science and Technology,21(6),901-906. |
| MLA | Zi-Chu Qi,et al."Parallel Error Detection for Leading Zero Anticipation".Journal of Computer Science and Technology 21.6(2006):901-906. |
入库方式： OAI收割
来源：计算技术研究所
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