中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
An improved phase digitization mechanism for fast-locking low-power all-digital PLLs

文献类型:期刊论文

作者Xie LL(谢琳琳); Hei Y(黑勇); Wang Y(王扬); Qiao SS(乔树山)
刊名ieice electronics express
出版日期2017-11-10
文献子类期刊论文
源URL[http://159.226.55.106/handle/172511/17994]  
专题微电子研究所_智能感知研发中心
推荐引用方式
GB/T 7714
Xie LL,Hei Y,Wang Y,et al. An improved phase digitization mechanism for fast-locking low-power all-digital PLLs[J]. ieice electronics express,2017.
APA 谢琳琳,黑勇,王扬,&乔树山.(2017).An improved phase digitization mechanism for fast-locking low-power all-digital PLLs.ieice electronics express.
MLA 谢琳琳,et al."An improved phase digitization mechanism for fast-locking low-power all-digital PLLs".ieice electronics express (2017).

入库方式: OAI收割

来源:微电子研究所

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