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32-Bit 4 x 4 Bit-Slice RSFQ Matrix Multiplier

文献类型：期刊论文

作者Tang, Guang-Ming; Qu, Pei-Yao; Ye, Xiao-Chun; Fan, Dong-Rui; Sun, Ning-Hui
刊名IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
出版日期2018-10-01
卷号28期号:7页码:5
关键词Hardware algorithm matrix multiplier micro-processor rapid single-flux-quantum (RSFQ) superconducting integrated circuits
ISSN号1051-8223
DOI10.1109/TASC.2018.2836954
英文摘要A 32-bit 4 x 4 bit-slice rapid single-flux-quantum (RSFQ) matrix multiplier is proposed. The multiplier mainly consists of bit-slice multipliers and bit-slice adders. The multiplication of unsigned integer matrices is implemented by control signals. The matrix multiplier used synchronous concurrent-flow clocking. The results show that a 16-bit bit-slice processing has the least latency at 10 GHz.
资助项目Pioneer Hundred Talents Program (C) of Chinese Academy of Sciences, China[2017004] ; Foundation of Director of the State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences[CARCH3101] ; Strategic Priority Research Program of Chinese Academy of Sciences[XDA18020200] ; Key Program of the National Natural Science Foundation of China[61732018]
WOS研究方向Engineering ; Physics
语种英语
WOS记录号WOS:000435190700001
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
源URL[http://119.78.100.204/handle/2XEOYT63/5171]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Tang, Guang-Ming
作者单位Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China
推荐引用方式
GB/T 7714		 Tang, Guang-Ming,Qu, Pei-Yao,Ye, Xiao-Chun,et al. 32-Bit 4 x 4 Bit-Slice RSFQ Matrix Multiplier[J]. IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,2018,28(7):5.
APA Tang, Guang-Ming,Qu, Pei-Yao,Ye, Xiao-Chun,Fan, Dong-Rui,&Sun, Ning-Hui.(2018).32-Bit 4 x 4 Bit-Slice RSFQ Matrix Multiplier.IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,28(7),5.
MLA Tang, Guang-Ming,et al."32-Bit 4 x 4 Bit-Slice RSFQ Matrix Multiplier".IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 28.7(2018):5.

入库方式： OAI收割

来源：计算技术研究所

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