PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses
文献类型:期刊论文
作者 | Zhang, Jiutian1,2; Liu, Yuhang1,2; Li, Haifeng1,2; Zhu, Xiaojing1,2; Chen, Mingyu1,2 |
刊名 | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS
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出版日期 | 2018-06-01 |
卷号 | 17期号:3页码:17 |
关键词 | TLB misses hardware profiling tool memory trace collector efficiency precision |
ISSN号 | 1539-9087 |
DOI | 10.1145/3182174 |
英文摘要 | As the memory access footprints of applications in areas like data analytics increase, the latency overhead of translation lookaside buffer (TLB) misses increases. Thus, the efficiency of TLB becomes increasingly critical for overall system performance. Analyzing TLB miss traces is useful for hardware architecture design and software application optimization. Utilizing cycle-accurate simulators or instrumentation tools is very time-consuming and/or inaccurate for tracing and profiling TLB misses. In this article, we propose an efficient and precise tool to collect and profile last-level TLB misses. This tool utilizes a novel software method called Page Table Access Tracing (PTAT), storing last-level page table entries of certain workload processes into a reserved uncached memory region. Therefore, each last-level TLB miss incurred by user process corresponds to one uncached page table access to main memory, which can be captured and recorded by a hardware memory bus monitor. The detected information is then dumped into offline storage. In this manner, full TLB miss traces are collected and can be analyzed flexibly. Compared to previous software-based methods, this method achieves higher performance. Experiments show that, compared with a state-of-the-art kernel instrumentation method (BadgerTrap), which lacks complete dumping trace function, the speedup is still up to 3.88-fold for memory-intensive benchmarks. Due to the improved efficiency and completeness of tracing, case studies validate that more flexible profiling can be conducted, which is of great significance for TLB performance optimization. The accuracy of PTAT is verified by both dedicated sequence and performance counters. |
资助项目 | National Key Research and Development Plan of China[2017YFB1001602] ; NSFC (National Science Foundation of China)[61772497] ; NSFC (National Science Foundation of China)[61521092] ; State Key Laboratory of Computer Architecture Foundation[CARCH2601] |
WOS研究方向 | Computer Science |
语种 | 英语 |
WOS记录号 | WOS:000434645800005 |
出版者 | ASSOC COMPUTING MACHINERY |
源URL | [http://119.78.100.204/handle/2XEOYT63/5213] ![]() |
专题 | 中国科学院计算技术研究所期刊论文_英文 |
通讯作者 | Liu, Yuhang |
作者单位 | 1.Univ Chinese Acad Sci, 6 Kexueyuan South Rd Zhongguancun, Beijing 100190, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, 6 Kexueyuan South Rd Zhongguancun, Beijing 100190, Peoples R China |
推荐引用方式 GB/T 7714 | Zhang, Jiutian,Liu, Yuhang,Li, Haifeng,et al. PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses[J]. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS,2018,17(3):17. |
APA | Zhang, Jiutian,Liu, Yuhang,Li, Haifeng,Zhu, Xiaojing,&Chen, Mingyu.(2018).PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses.ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS,17(3),17. |
MLA | Zhang, Jiutian,et al."PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses".ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 17.3(2018):17. |
入库方式: OAI收割
来源:计算技术研究所
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