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A Pipelining Loop Optimization Method for Dataflow Architecture

文献类型：期刊论文

作者Tan, Xu1,5; Ye, Xiao-Chun1,4; Shen, Xiao-Wei1,5; Xu, Yuan-Chao1,3; Wang, Da1; Zhang, Lunkai2; Li, Wen-Ming1; Fan, Dong-Rui1,5; Tang, Zhi-Min1
刊名JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
出版日期2018
卷号33期号:1页码:116-130
关键词dataflow model control-flow model loop optimization exascale computing scientific application
ISSN号1000-9000
DOI10.1007/s11390-017-1748-5
英文摘要With the coming of exascale supercomputing era, power efficiency has become the most important obstacle to build an exascale system. Dataflow architecture has native advantage in achieving high power efficiency for scientific applications. However, the state-of-the-art dataflow architectures fail to exploit high parallelism for loop processing. To address this issue, we propose a pipelining loop optimization method (PLO), which makes iterations in loops flow in the processing element (PE) array of dataflow accelerator. This method consists of two techniques, architecture-assisted hardware iteration and instruction-assisted software iteration. In hardware iteration execution model, an on-chip loop controller is designed to generate loop indexes, reducing the complexity of computing kernel and laying a good foundation for pipelining execution. In software iteration execution model, additional loop instructions are presented to solve the iteration dependency problem. Via these two techniques, the average number of instructions ready to execute per cycle is increased to keep floating-point unit busy. Simulation results show that our proposed method outperforms static and dynamic loop execution model in floating-point efficiency by 2.45x and 1.1x on average, respectively, while the hardware cost of these two techniques is acceptable.
资助项目National Key Research and Development Program of China[2016YFB0200501] ; National Natural Science Foundation of China[61332009] ; National Natural Science Foundation of China[61521092] ; Open Project Program of State Key Laboratory of Mathematical Engineering and Advanced Computing[2016A04] ; Beijing Municipal Science and Technology Commission[Z15010101009] ; Open Project Program of State Key Laboratory of Computer Architecture[CARCH201503] ; China Scholarship Council ; Beijing Advanced Innovation Center for Imaging Technology
WOS研究方向Computer Science
语种英语
WOS记录号WOS:000423587100007
出版者SCIENCE PRESS
源URL[http://119.78.100.204/handle/2XEOYT63/5607]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Xu, Yuan-Chao
作者单位1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China
2.Univ Chicago, Dept Comp Sci, Chicago, IL 60637 USA
3.Capital Normal Univ, Coll Informat Engn, Beijing 100048, Peoples R China
4.State Key Lab Math Engn & Adv Comp, Wuxi 214125, Peoples R China
5.Univ Chinese Acad Sci, Sch Comp & Control Engn, Beijing 100049, Peoples R China
推荐引用方式
GB/T 7714		 Tan, Xu,Ye, Xiao-Chun,Shen, Xiao-Wei,et al. A Pipelining Loop Optimization Method for Dataflow Architecture[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2018,33(1):116-130.
APA Tan, Xu.,Ye, Xiao-Chun.,Shen, Xiao-Wei.,Xu, Yuan-Chao.,Wang, Da.,...&Tang, Zhi-Min.(2018).A Pipelining Loop Optimization Method for Dataflow Architecture.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,33(1),116-130.
MLA Tan, Xu,et al."A Pipelining Loop Optimization Method for Dataflow Architecture".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 33.1(2018):116-130.

入库方式： OAI收割

来源：计算技术研究所

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