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Wrapper scan chains design for rapid and low power testing of embedded cores

文献类型：期刊论文

作者Han, YH; Hu, Y; Li, XW; Li, HW; Chandra, A; Wen, XQ
刊名IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS
出版日期2005-09-01
卷号E88D期号:9页码:2126-2134
关键词SOC testing wrapper design scan slices overlapping
ISSN号0916-8532
DOI10.1093/ietisy/e88-d.9.2126
英文摘要Connection of internal scan chains in core wrapper design (CWD) is necessary to handle the width match of TAM and infernal scan chains. However, conventional serial connection of internal scan chains incurs power and time penalty. Study shows that the distribution and high density of don't care bits (X-bits) in test patterns make scan slices overlapping and partial overlapping possible. A novel parallel CWD (pCWD) approach is presented in this paper for lowering test power by shortening wrapper scan chains and adjusting test patterns. In order to achieve shift time reduction from overlapping in pCWD, a two-phase process on test pattern: partition and fill, is presented. Experimental results on d695 of ITC2002 benchmark demonstrated the shift time and test power have been decreased by 1.5 and 15 times, respectively. In addition, the proposed pCWD can be used as a stand-alone time reduction technique, which has better performance than previous techniques.
WOS研究方向Computer Science
语种英语
WOS记录号WOS:000232082000014
出版者IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
源URL[http://119.78.100.204/handle/2XEOYT63/10126]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Han, YH
作者单位1.Chinese Acad Sci, Comp Technol Inst, Beijing 100080, Peoples R China
2.Kyushu Inst Technol, Fac Comp Sci & Syst Engn, Iizuka, Fukuoka 8208502, Japan
3.Synopsys Inc, Mountain View, CA 94043 USA
4.Chinese Acad Sci, Grad Sch, Beijing 100039, Peoples R China
推荐引用方式
GB/T 7714		 Han, YH,Hu, Y,Li, XW,et al. Wrapper scan chains design for rapid and low power testing of embedded cores[J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS,2005,E88D(9):2126-2134.
APA Han, YH,Hu, Y,Li, XW,Li, HW,Chandra, A,&Wen, XQ.(2005).Wrapper scan chains design for rapid and low power testing of embedded cores.IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS,E88D(9),2126-2134.
MLA Han, YH,et al."Wrapper scan chains design for rapid and low power testing of embedded cores".IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS E88D.9(2005):2126-2134.

入库方式： OAI收割

来源：计算技术研究所

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