High throughput and low memory access sub-pixel interpolation architecture for H.264/AVC HDTV decoder
文献类型：期刊论文
| 作者 | Wang, RG; Li, M; Li, JT; Zhang, YD |
| 刊名 | IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
 |
| 出版日期 | 2005-08-01 |
| 卷号 | 51期号:3页码:1006-1013 |
| 关键词 | H.264 sub-pixel interpolation HDTV AVC |
| ISSN号 | 0098-3063 |
| 英文摘要 | In this paper, we proposed a parallel and pipeline architecture for the sub-pixel interpolation filter in H.264/AVC conformed HDTV decoder. To efficiently use the bus bandwidth, we bring forward three memory access optimization strategies to avoid redundant data transfer and improve data bus utilization. To improve the processing throughput, we use parallel and multi-stage pipeline architecture for conducting data transmission and interpolation filtering in parallel. Moreover, To balance the tradeoff between memory accessing scheme and sub-pixel interpolation processing granularity we devise a dedicated buffer organization to convert tree-structured block size reading to fixable and sequential processing. As compared to the traditional designs, our scheme offers 60% reduced memory data transfer. While clocking at 66MHz, our,design can support 1280x720@30Hz processing throughput. The proposed design is suitable for low cost and real-time applications. Moreover, it can easily be applied in system-on-chip design. |
| WOS研究方向 | Engineering ; Telecommunications |
| 语种 | 英语 |
| WOS记录号 | WOS:000232036200039 |
| 出版者 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| 源URL | [http://119.78.100.204/handle/2XEOYT63/10210]  |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Wang, RG |
| 作者单位 | Chinese Acad Sci, Inst Comp Technol, Beijing 100864, Peoples R China |
| 推荐引用方式 GB/T 7714 | Wang, RG,Li, M,Li, JT,et al. High throughput and low memory access sub-pixel interpolation architecture for H.264/AVC HDTV decoder[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,2005,51(3):1006-1013. |
| APA | Wang, RG,Li, M,Li, JT,&Zhang, YD.(2005).High throughput and low memory access sub-pixel interpolation architecture for H.264/AVC HDTV decoder.IEEE TRANSACTIONS ON CONSUMER ELECTRONICS,51(3),1006-1013. |
| MLA | Wang, RG,et al."High throughput and low memory access sub-pixel interpolation architecture for H.264/AVC HDTV decoder".IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 51.3(2005):1006-1013. |
入库方式： OAI收割
来源：计算技术研究所
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