Optimizing compiler for shared-memory multiple SIMD architecture
文献类型：期刊论文
| 作者 | Zhang, Weihua; Qian, Xinglong; Wang, Ye; Zang, Binyu; Zhu, Chuanqi |
| 刊名 | ACM SIGPLAN NOTICES
 |
| 出版日期 | 2006-07-01 |
| 卷号 | 41期号:7页码:199-208 |
| 关键词 | algorithms performance. optimization shared memory multiple SIMD locality replication |
| ISSN号 | 0362-1340 |
| 英文摘要 | With the rapid growth of multimedia and game, these applications put more and more pressure on the processing ability of modern processors. Multiple SIMD architecture is widely used in multimedia processing field as a multimedia accelerator. With the consideration of power consumption and chip size, shared memory multiple SIMD architecture is mainly used in embedded SOCs. In order to further fit mobile environment, there is the constraint of limited register number as well. Although shared memory multiple SIMD architecture simplify the chip design, these constraints are the major obstacles to map the real multimedia applications to these architectures. Until now, to our best knowledge, there is little research on the optimizing techniques for shared memory multiple SIMD architecture. In this paper, we present a compiler framework, which aims at automatically generating high performance codes for shared memory multiple SIMD architecture. In this framework, we reduce the competition of shared data bus through increasing the register locality, improve the utilization of data bus by read-only data vector replication and solve the problem of limited register number through a resource allocation algorithm. The framework also handlers the issues concerning on data transformation. As the experimental results shown, this framework is successful in mapping real multimedia applications to shared memory multiple SIMD architecture. It leads to an average speedup by a factor of 3.19 and an average utilization of SM-SIMD architecture with 8 SIMD units by a factor of 52.6%. |
| WOS研究方向 | Computer Science |
| 语种 | 英语 |
| WOS记录号 | WOS:000202972200023 |
| 出版者 | ASSOC COMPUTING MACHINERY |
| 源URL | [http://119.78.100.204/handle/2XEOYT63/10480]  |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Zhang, Weihua |
| 作者单位 | 1.Fudan Univ, Parallel Proc Inst, Shanghai, Peoples R China 2.Chinese Acad Sci, Inst Comp Technol, Architect Key Lab, Beijing 100864, Peoples R China |
| 推荐引用方式 GB/T 7714 | Zhang, Weihua,Qian, Xinglong,Wang, Ye,et al. Optimizing compiler for shared-memory multiple SIMD architecture[J]. ACM SIGPLAN NOTICES,2006,41(7):199-208. |
| APA | Zhang, Weihua,Qian, Xinglong,Wang, Ye,Zang, Binyu,&Zhu, Chuanqi.(2006).Optimizing compiler for shared-memory multiple SIMD architecture.ACM SIGPLAN NOTICES,41(7),199-208. |
| MLA | Zhang, Weihua,et al."Optimizing compiler for shared-memory multiple SIMD architecture".ACM SIGPLAN NOTICES 41.7(2006):199-208. |
入库方式： OAI收割
来源：计算技术研究所
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