Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread
文献类型：期刊论文
| 作者 | Rui, Hou; Zhang, Longbing; Hu, Weiwu |
| 刊名 | MICROPROCESSORS AND MICROSYSTEMS
 |
| 出版日期 | 2007-05-01 |
| 卷号 | 31期号:3页码:200-211 |
| 关键词 | Dynamic Prefetching Thread Chip Multiprocessors |
| ISSN号 | 0141-9331 |
| DOI | 10.1016/j.micpro.2006.09.002 |
| 英文摘要 | A Dynamic Prefetching Thread scheme is proposed in this paper to accelerate sequential programs on Chip Multiprocessors. This scheme belongs to the hardware-generated thread-based prefetching technique and can decouple the performance and correctness to some extent. This paper describes the necessary hardware infrastructure supporting Dynamic Prefetching Thread on traditional Chip Multiprocessors. Aiming at the loosely coupled feature of Chip Multiprocessors, we present the "Shadow Register" mechanism to support rapid register transportation among multi-cores and discuss the selection of thread spawn time. Furthermore, two aggressive thread construction policies, known as "Self-Loop" and "Fork-on-Recursive-Call", are proposed. "Self-Loop" policy can greatly enlarge the prefetching range and issue more timely prefetches. "Fork-on-Recursive-Call" policy can effectively accelerate applications accessing trees or graphs via recursive calls. For a set of memory limited benchmarks selected from Olden benchmark, SPEC CPU2000 as well as Stream benchmark, an average speedup of 18% is achieved on dual-core CMP when constructing basic Dynamic Prefetching Threads, and this gain grows to 29.6% when adopting our aggressive thread construction policies. (c) 2006 Elsevier B.V. All rights reserved. |
| WOS研究方向 | Computer Science ; Engineering |
| 语种 | 英语 |
| WOS记录号 | WOS:000245613400005 |
| 出版者 | ELSEVIER SCIENCE BV |
| 源URL | [http://119.78.100.204/handle/2XEOYT63/11007]  |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Rui, Hou |
| 作者单位 | Chinese Acad Sci, Key Lab Comp Syst & Architecture, Comp Technol Inst, Beijing 100080, Peoples R China |
| 推荐引用方式 GB/T 7714 | Rui, Hou,Zhang, Longbing,Hu, Weiwu. Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread[J]. MICROPROCESSORS AND MICROSYSTEMS,2007,31(3):200-211. |
| APA | Rui, Hou,Zhang, Longbing,&Hu, Weiwu.(2007).Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread.MICROPROCESSORS AND MICROSYSTEMS,31(3),200-211. |
| MLA | Rui, Hou,et al."Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread".MICROPROCESSORS AND MICROSYSTEMS 31.3(2007):200-211. |
入库方式： OAI收割
来源：计算技术研究所
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