中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
The design of acquisition circuit for grating digital signal based on FPGA (EI CONFERENCE)

文献类型:会议论文

作者Wang W.-G.
出版日期2010
会议名称2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010, August 20, 2010 - August 22, 2010
会议地点Chengdu, China
关键词In order to resolve the poor suppression capability of noise and fitter interference existing in grating encoder high-rate subdivision and the poor accuracy of kam-to counting circuit the results show that the design method will help improve the controlled object of measurement precision and control accuracy. 2010 IEEE. we design a circuit based on FPGA to realize multiplier kam and filter for the output of two-way orthogonal signal generated by Incremental Optical Encoder. The system is mainly divided into three modules such as filtering multiplier kam-to and counting. The main function of filter circuit is to eliminate the jitter and noise interference existing in the quadrate encoder signals. Kam-to multiplier circuit can accurately judge the full cycle and half-cycle of incremental encoder at the same time can make fourfold multiplier. Counting circuit can use IP cores owned by Quartus II which is not restricted on the median. At last timing simulation based on Modelsim carried on the three modules
页码V6134-V6137
收录类别EI
源URL[http://ir.ciomp.ac.cn/handle/181722/33996]  
专题长春光学精密机械与物理研究所_中科院长春光机所知识产出_会议论文
推荐引用方式
GB/T 7714
Wang W.-G.. The design of acquisition circuit for grating digital signal based on FPGA (EI CONFERENCE)[C]. 见:2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010, August 20, 2010 - August 22, 2010. Chengdu, China.

入库方式: OAI收割

来源:长春光学精密机械与物理研究所

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