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An ultra-low power CMOS random number generator
文献类型：期刊论文
| 作者 | Zhou, SH ; Zhang, W ; Wu, NJ |
| 刊名 | solid-state electronics
 |
| 出版日期 | 2008 |
| 卷号 | 52期号:2页码:233-238 |
| 关键词 | random number generator dual-drain MOS transistor noise oscillator low power system |
| ISSN号 | 0038-1101 |
| 通讯作者 | wu, nj, chinese acad sci, inst semicond, natl lab superlattices & microstruct, pob 912, beijing 100083, peoples r china. 电子邮箱地址: nanjian@red.semi.ac.cn |
| 中文摘要 | this paper proposes an ultra-low power cmos random number generator (ring), which is based on an oscillator-sampling architecture. the noisy oscillator consists of a dual-drain mos transistor, a noise generator and a voltage control oscillator. the dual-drain mos transistor can bring extra-noise to the drain current or the output voltage so that the jitter of the oscillator is much larger than the normal oscillator. the frequency division ratio of the high-frequency sampling oscillator and the noisy oscillator is small. the rng has been fabricated in a 0.35 mu m cmos process. it can produce good quality bit streams without any post-processing. the bit rate of this rng could be as high as 100 kbps. it has a typical ultra-low power dissipation of 0.91 mu w. this novel circuit is a promising unit for low power system and communication applications. (c) 2007 elsevier ltd. all rights reserved. |
| 学科主题 | 微电子学 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 公开日期 | 2010-03-08 |
| 源URL | [http://ir.semi.ac.cn/handle/172111/6840]  |
| 专题 | 半导体研究所_中国科学院半导体研究所（2009年前） |
| 推荐引用方式 GB/T 7714 | Zhou, SH,Zhang, W,Wu, NJ. An ultra-low power CMOS random number generator[J]. solid-state electronics,2008,52(2):233-238. |
| APA | Zhou, SH,Zhang, W,&Wu, NJ.(2008).An ultra-low power CMOS random number generator.solid-state electronics,52(2),233-238. |
| MLA | Zhou, SH,et al."An ultra-low power CMOS random number generator".solid-state electronics 52.2(2008):233-238. |
入库方式： OAI收割
来源：半导体研究所
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