A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors
文献类型：期刊论文
| 作者 | Zhang WC (Zhang Wancheng) ; Wu NH (Wu Nan-Han) |
| 刊名 | ieee transactions on circuits and systems i-regular papers
 |
| 出版日期 | 2007 |
| 卷号 | 54期号:11页码:2516-2527 |
| 关键词 | frequency divider |
| ISSN号 | issn: 1549-8328 |
| 通讯作者 | zhang, wc, chinese acad sci, inst semicond, beijing 100083, peoples r china. 电子邮箱地址: zhangwc@red.semi.ac.cn ; nanjian@red.semi.ac.cn |
| 中文摘要 | this paper proposes a novel phase-locked loop (pll) frequency synthesizer using single-electron devices (seds) and metal-oxide-semiconductor (mos) field-effect transistors. the pll frequency synthesizer mainly consists of a single-electron transistor (set)/mos hybrid voltage-controlled oscillator circuit, a single-electron (se) turnstile/mos hybrid phase-frequency detector (pfd) circuit and a se turnstile/mos hybrid frequency divider. the phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. we propose a spice model to describe the behavior of the mosfet-based se turnstile. the authors simulate the performance of the pill block circuits and the whole pll synthesizer. simulation results indicated that the circuit can well perform the operation of the pll frequency synthesizer at room temperature. the pill synthesizer is very compact. the total number of the transistors is less than 50. the power dissipation of the proposed pll circuit is less than 3 uw. the authors discuss the effect of fabrication tolerance, the effect of background charge and the se transfer accuracy on the performance of the pll circuit. a technique to compensate parameter dispersions of seds is proposed. |
| 学科主题 | 微电子学 |
| 收录类别 | SCI |
| 语种 | 英语 |
| 公开日期 | 2010-03-29 |
| 源URL | [http://ir.semi.ac.cn/handle/172111/9194]  |
| 专题 | 半导体研究所_中国科学院半导体研究所（2009年前） |
| 推荐引用方式 GB/T 7714 | Zhang WC ,Wu NH . A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors[J]. ieee transactions on circuits and systems i-regular papers,2007,54(11):2516-2527. |
| APA | Zhang WC ,&Wu NH .(2007).A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors.ieee transactions on circuits and systems i-regular papers,54(11),2516-2527. |
| MLA | Zhang WC ,et al."A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors".ieee transactions on circuits and systems i-regular papers 54.11(2007):2516-2527. |
入库方式： OAI收割
来源：半导体研究所
浏览0
下载0
收藏0
其他版本
除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。