中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
A direct digital frequency synthesizer with single-stage delta-sigma interpolator and current-steering DAC

文献类型:会议论文

作者Ni, WN ; Dai, FF ; Shi, Y ; Jaeger, RC
出版日期2005
会议名称symposium on vlsi circuits
会议日期jun 16-18, 2005
会议地点kyoto, japan
关键词DDFS delta-sigma interpolator CMOS DAC Q(2) Random Walk
页码digest of technical papers: 56-59
通讯作者ni, wn, chinese acad sci, inst semicond, beijing 100083, peoples r china.
中文摘要this paper presents a direct digital frequency synthesizer (ddfs) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300ms/s 12-bit current-steering dac based on q(2) random walk switching scheme. the delta-sigma interpolator is used to reduce the phase truncation error and the rom size. the measured spurious-free dynamic range (sfdr) is greater than 80 db for 8-bit phase value and 12-bit sine-amplitude output. the ddfs prototype is fabricated in a 0.35um cmos technology with core area of 1.11mm(2).
英文摘要this paper presents a direct digital frequency synthesizer (ddfs) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300ms/s 12-bit current-steering dac based on q(2) random walk switching scheme. the delta-sigma interpolator is used to reduce the phase truncation error and the rom size. the measured spurious-free dynamic range (sfdr) is greater than 80 db for 8-bit phase value and 12-bit sine-amplitude output. the ddfs prototype is fabricated in a 0.35um cmos technology with core area of 1.11mm(2).; zhangdi于2010-03-29批量导入; made available in dspace on 2010-03-29t06:06:13z (gmt). no. of bitstreams: 1 2323.pdf: 835837 bytes, checksum: ecb3bf50d4f7cd41c2bf30ad7d4943ce (md5) previous issue date: 2005; japan soc appl phys.; ieee solid-state circuits soc.; inst elect informat & commun engeers japan.; ieee elect dev soc.; chinese acad sci, inst semicond, beijing 100083, peoples r china
收录类别CPCI-S
会议主办者japan soc appl phys.; ieee solid-state circuits soc.; inst elect informat & commun engeers japan.; ieee elect dev soc.
会议录2005 symposium on vlsi circuits
会议录出版者japan society applied physics ; 5th floor kudan kita bldg 1-12-3 kudan-kita chiyoda-ku, tokyo, 102, japan
学科主题人工智能
会议录出版地5th floor kudan kita bldg 1-12-3 kudan-kita chiyoda-ku, tokyo, 102, japan
语种英语
ISBN号4-900784-01-x
源URL[http://ir.semi.ac.cn/handle/172111/9882]  
专题半导体研究所_中国科学院半导体研究所(2009年前)
推荐引用方式
GB/T 7714
Ni, WN,Dai, FF,Shi, Y,et al. A direct digital frequency synthesizer with single-stage delta-sigma interpolator and current-steering DAC[C]. 见:symposium on vlsi circuits. kyoto, japan. jun 16-18, 2005.

入库方式: OAI收割

来源:半导体研究所

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