A Smart Frequency Presetting Technique for Fast Lock-in LC-PLL Frequency Synthesizer
文献类型：会议论文
| 作者 | Yan XZ (Yan Xiaozhou) ; Kuang XF (Kuang Xiaofei) ; Wu NJ (Wu Nanjian) |
| 出版日期 | 2009 |
| 会议名称 | ieee international symposium on circuits and systems (iscas 2009) |
| 会议日期 | may 24-27, 2009 |
| 会议地点 | taipei, taiwan |
| 页码 | 1525-1528 |
| 英文摘要 | this paper proposes a smart frequency presetting technique for fast lock-in lc-pll frequency synthesizer. the technique accurately presets the frequency of vco with small initial frequency error and greatly reduces the lock-in time. it can automatically compensate preset frequency variation with process and temperature. a 2.4ghz synthesizer with 1mhz reference input was implemented in 0.35 mu m cmos process. the chip core area is 0.4mm(2). output frequency of vco ranges from 2390 to 2600mhz. the measured results show that the typical lock-in time is 3 mu s. the phase noise is -112dbc/hz at 600khz offset from center frequency. the test chip consumes current of 22ma that includes the consumption of the i/o buffers.; submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-04-26t16:11:00z no. of bitstreams: 1 a smart frequency presetting technique for fast lock-in lc-pll frequency synthesizer.pdf: 1164798 bytes, checksum: 177f0d3bb02ca9fafd3072f16103e7ba (md5); made available in dspace on 2010-04-26t16:11:00z (gmt). no. of bitstreams: 1 a smart frequency presetting technique for fast lock-in lc-pll frequency synthesizer.pdf: 1164798 bytes, checksum: 177f0d3bb02ca9fafd3072f16103e7ba (md5) previous issue date: 2009; 其它 |
| 收录类别 | CPCI（ISTP） |
| 合作状况 | 其它 |
| 会议录 | iscas: 2009 ieee international symposium on circuits and systems
 |
| 会议录出版者 | ieee ; 345 e 47th st, new york, ny 10017 usa |
| 学科主题 | 微电子学 |
| 会议录出版地 | 345 e 47th st, new york, ny 10017 usa |
| 语种 | 英语 |
| ISBN号 | 978-1-4244-3827-3 |
| 源URL | [http://ir.semi.ac.cn/handle/172111/11197]  |
| 专题 | 半导体研究所_中国科学院半导体研究所（2009年前） |
| 推荐引用方式 GB/T 7714 | Yan XZ ,Kuang XF ,Wu NJ . A Smart Frequency Presetting Technique for Fast Lock-in LC-PLL Frequency Synthesizer[C]. 见:ieee international symposium on circuits and systems (iscas 2009). taipei, taiwan. may 24-27, 2009. |
入库方式： OAI收割
来源：半导体研究所
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