Method of fabricating of light emitting device with controlled lattice mismatch
文献类型：专利
| 作者 | SHIRAISHI, MASASHI; ITO, SATOSHI; NAKANO, KAZUSHI; ISHIBASHI, AKIRA; IKEDA, MASAO; OKUYAMA, HIROYUKI; AKIMOTO, KATSUHIRO; HINO, TOMONORI; UKITA, MASAKAZU |
| 发表日期 | 1999-02-16 |
| 专利号 | US5872023 |
| 著作权人 | SONY CORPORATION |
| 国家 | 美国 |
| 文献子类 | 授权发明 |
| 其他题名 | Method of fabricating of light emitting device with controlled lattice mismatch |
| 英文摘要 | The semiconductor light emitting device includes a semiconductor substrate (1), a first conductivity type first cladding layer (2) deposited on the semiconductor substrate (1), an active layer (4) deposited on the first cladding layer (2), and the second conductivity type second cladding layer (6) deposited on the active layer (4). The first and the second cladding layers (2, 6) are made of the II/VI-compound semiconductors including at least one kind of II group elements such as Zn, Hg, Cd, Mg and at least one kind of VI group elements such as S, Se, Te. The lattice mismatching DELTA a/a (%) between at least one of the first cladding layer (2) and the second cladding layer (6) and the substrate is set within the range of -0.9% |
| 公开日期 | 1999-02-16 |
| 申请日期 | 1997-03-31 |
| 状态 | 失效 |
| 源URL | [http://ir.opt.ac.cn/handle/181661/44469]  |
| 专题 | 半导体激光器专利数据库 |
| 作者单位 | SONY CORPORATION |
| 推荐引用方式 GB/T 7714 | SHIRAISHI, MASASHI,ITO, SATOSHI,NAKANO, KAZUSHI,et al. Method of fabricating of light emitting device with controlled lattice mismatch. US5872023. 1999-02-16. |
入库方式： OAI收割
来源：西安光学精密机械研究所
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