Manufacture of semiconductor integrated element
文献类型:专利
作者 | KATOU YOSHITAKE |
发表日期 | 1988-12-20 |
专利号 | JP1988311785A |
著作权人 | 日本電気株式会社 |
国家 | 日本 |
文献子类 | 发明申请 |
其他题名 | Manufacture of semiconductor integrated element |
英文摘要 | PURPOSE:To facilitate forming a semiconductor integrated device in which elements are isolated using high resistance semiconductor and leveling the surface of the device by a method wherein a mixed atmosphere of a growth atmosphere of semi-insulating semiconductor and an atmosphere of halide gas is formed in the upstream of a substrate to make the semiconductor grow. CONSTITUTION:A pattern is formed in an SiO2 film 206 and a cap layer 205, a cladding layer 204 and an active layer 203 in a current blocking part 207 and a coupling part 208 are removed by etching with the patterned SiO2 film 206 as a mask. Then a DH crystal is put in the waiting chamber 119 of a vapor growth equipment and heated by a heating furnace 118. Carrier gas containing HCl is made to flow on an Fe/In source 115 doped with Fe from a supply tube 111 and carrier gas containing HCl is made to flow on an In source 117 from a supply tube 113 and PH3 and HCl are supplied with carrier gas through a by-path tube 112. As a result, a mixed atmosphere of a growth atmosphere of Fe-doped InP and an atmosphere of HCl which is halide gas is formed in a growth chamber 116. With this constitution, a semiconductor integrated device in which element isolation layers are made of high resistance semiconductor can be obtained and its surface can be leveled. |
公开日期 | 1988-12-20 |
申请日期 | 1987-06-12 |
状态 | 失效 |
源URL | [http://ir.opt.ac.cn/handle/181661/67611] ![]() |
专题 | 半导体激光器专利数据库 |
作者单位 | 日本電気株式会社 |
推荐引用方式 GB/T 7714 | KATOU YOSHITAKE. Manufacture of semiconductor integrated element. JP1988311785A. 1988-12-20. |
入库方式: OAI收割
来源:西安光学精密机械研究所
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