半導体レ-ザ装置
文献类型：专利
| 作者 | 岡井 誠; 魚見 和久; 辻 伸二; 茅根 直樹; 原田 和英 |
| 发表日期 | 1996-07-08 |
| 专利号 | JP2539416B2 |
| 著作权人 | 株式会社日立製作所 |
| 国家 | 日本 |
| 文献子类 | 授权发明 |
| 其他题名 | 半導体レ-ザ装置 |
| 英文摘要 | PURPOSE:To reduce a parasitic capacitance related to a junction current block layer by more than 90 % and therefore to realize a super-high speed modulation more than 20 GHz by a method wherein impurity ions with deep level for a semiconductor material crystal are implanted into a part containing a pnp or an npn current block layer for semi-insulation. CONSTITUTION:An n-type InGaAs optical guide layer 2, an un-doped InGaAsP active layer 3, a P-type InGaAs buffer layer 4, and a P-type InP clad layer 5 are successively formed on an n-type InP substrate 1 surface, and a mesa- stripe, where an active layer about 1 mum wide is left, is formed thereafter. Next, a p-type InP buried layer 6 and an n-type InP layer 7 are grown at both sides of the mesa-stripe for the formation of a current block layer and a process follows, wherein a p-type InP clad layer 8 and a p-type InGaAsP gap layer 9 are formed on the whole surface. And, elements such as Fe, Cu, Cr, B, and the like are ion-implanted into both sides of the active layer with varying the accelerating energy at a few levels ranging from 0.75 to 3 MeV for semi- insulation. By these processes, a parasitic capacitance can be reduced from 10-40pF to 1-3pF. |
| 公开日期 | 1996-10-02 |
| 申请日期 | 1987-03-25 |
| 状态 | 失效 |
| 源URL | [http://ir.opt.ac.cn/handle/181661/77978]  |
| 专题 | 半导体激光器专利数据库 |
| 作者单位 | 株式会社日立製作所 |
| 推荐引用方式 GB/T 7714 | 岡井 誠,魚見 和久,辻 伸二,等. 半導体レ-ザ装置. JP2539416B2. 1996-07-08. |
入库方式： OAI收割
来源：西安光学精密机械研究所
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