中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
Distributed Self-Clock: A Suitable Architecture for SFQ Circuits

文献类型:期刊论文

作者Yang, Jia-Hong1,2; Tang, Guang-Ming1; Zheng, Xiang-Yu1,2; Ye, Xiao-Chun1; Fan, Dong-Rui1,2; Zhang, Zhi-Min1; Sun, Ning-Hui1
刊名IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY
出版日期2020-10-01
卷号30期号:7页码:7
关键词Integrated circuit microprocessors single flux quantum (SFQ) timing scheme
ISSN号1051-8223
DOI10.1109/TASC.2020.3007175
英文摘要In this article, we propose a novel architecture for single-flux-quantum (SFQ) circuits. It is compatible to the existing synchronous and asynchronous timing schemes and reduces the hardware cost for implementing the pipeline blocking and flushing, which are the two methods to improve the performance of SFQ microprocessors. We simulate two crucial elements, and the functions of the elements are verified successfully. The proposed architecture simplifies the logic design of the circuits, and it can be considered as a general architecture for SFQ circuits because of the compelling characteristics.
资助项目Chinese Academy of Sciences, China[201893] ; Innovation Program of Institute of Computing Technology, Chinese Academy of Sciences[20186120] ; Strategic Priority Research Program of the Chinese Academy of Sciences[XDA18000000] ; National Natural Science Foundation of China[61732018]
WOS研究方向Engineering ; Physics
语种英语
WOS记录号WOS:000550652300001
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
源URL[http://119.78.100.204/handle/2XEOYT63/15941]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Tang, Guang-Ming
作者单位1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China
2.Univ Chinese Acad Sci, Beijing 100049, Peoples R China
推荐引用方式
GB/T 7714
Yang, Jia-Hong,Tang, Guang-Ming,Zheng, Xiang-Yu,et al. Distributed Self-Clock: A Suitable Architecture for SFQ Circuits[J]. IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,2020,30(7):7.
APA Yang, Jia-Hong.,Tang, Guang-Ming.,Zheng, Xiang-Yu.,Ye, Xiao-Chun.,Fan, Dong-Rui.,...&Sun, Ning-Hui.(2020).Distributed Self-Clock: A Suitable Architecture for SFQ Circuits.IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY,30(7),7.
MLA Yang, Jia-Hong,et al."Distributed Self-Clock: A Suitable Architecture for SFQ Circuits".IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 30.7(2020):7.

入库方式: OAI收割

来源:计算技术研究所

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