中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
Parallel LDPC Decoder Based on Low-Complexity Corrected Min Sum Algorithm

文献类型:会议论文

作者Sun, Yisong1,3; Li, Huan3; Zhang, Xinyu2; Guo, Chen3; Liu, Zijun3; Wang, Donglin3
出版日期2022
会议日期2022-4-23
会议地点Suzhou, China
关键词5G LDPC decoder LCC-MS UCP
英文摘要

To correct the errors introduced by the approximation in the Min Sum (MS) algorithm with low complexity, we proposed Low-Complexity Corrected Min Sum (LCC-MS) algorithm. Aiming at the implementation bottleneck of the algorithm on the self-developed DSP (Universal Communication Processor, UCP), we optimized the algorithm process and expanded the instruction set of UCP. Therefore, the LDPC decoder based on LCC-MS algorithm is implemented on UCP, and verified on the chip that has been taped out. The verification results of the longest code length and the highest code rate show that the LCC-MS algorithm has a gain of 0.16dB when the bit error rate is 10-5 compared with the MS algorithm, and the decoder based on LCC-MS algorithm can process up to 149 code blocks in one time slot.

语种英语
源URL[http://ir.ia.ac.cn/handle/173211/48581]  
专题国家专用集成电路设计工程技术研究中心_先进微处理器
作者单位1.University of Chinese Academy of Sciences
2.Beijing Smart Logic East Technology Co., Ltd.
3.Institute of Automation, Chinese Academy of Sciences
推荐引用方式
GB/T 7714
Sun, Yisong,Li, Huan,Zhang, Xinyu,et al. Parallel LDPC Decoder Based on Low-Complexity Corrected Min Sum Algorithm[C]. 见:. Suzhou, China. 2022-4-23.

入库方式: OAI收割

来源:自动化研究所

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