中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
首页 机构 成果 学者
  
  1. CAS IR Grid
  2. 计算技术研究所
  3. 中国科学院计算技术研究所
  4. 中国科学院计算技术研究所期刊论文
  5. 英文
An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme

文献类型：期刊论文

作者Cao, Yuan5,6; Wu, Yanze5,6; Wang, Wen4; Lu, Xu5,6; Chen, Shuai5; Ye, Jing2,3; Chang, Chip-Hong1
刊名IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
出版日期2021-10-04
页码12
关键词Hardware Random access memory Software algorithms Quantum computing Field programmable gate arrays Computers NIST Post-quantum cryptography eXtended Merkle signature scheme hardware accelerator
ISSN号1549-8328
DOI10.1109/TCSI.2021.3115786
英文摘要This paper presents a full hardware implementation of the eXtended Merkle Signature Scheme (XMSS), a NIST approved and IETF RFC specified post-quantum cryptography (PQC) algorithm. An optimized node traversal is proposed to enable efficient memory utilization without compromising the computational latency of the L-tree and Merkle tree construction, which are two key components used for the compression of the Winternitz One-Time Signature (WOTS) public key in XMSS. The computation of the authentication path during signature generation has also been significantly sped up by our proposed hardware implementation of the Buchmann, Dahmen, and Schneider (BDS) algorithm. Our implementation has completely avoided the use of block random-access memory, which is known to be vulnerable to side-channel attacks. The memory requirement has been highly optimized for implementation with small flip-flop chains and register counters as pointers for fast data access. To the best of our knowledge, this is the first full hardware implementation of all three key generation, signing and verification operations of XMSS. The design has been prototyped and evaluated on a 28 nm FPGA platform to demonstrate its performance improvements over the most efficient software and hardware/software co-design methods reported to date. Specifically, it increases the computational efficiency of the best reported XMSS implementation for key generation and signature generation by about 20% and 50%, respectively. It can also run at 10% higher clock speed than the fastest hardware implementation of signature verification in FPGA with 8% lower hardware resource utilization.
资助项目Fundamental Research Funds for Natural Science Foundation of Jiangsu Province[BK20191160] ; Open Research of the State Key Laboratory of Computer Architecture[CARCH201901] ; QingLan Project ; Changzhou Science and Technology Program[CJ20200071] ; Changzhou Science and Technology Program[2020029]
WOS研究方向Engineering
语种英语
WOS记录号WOS:000732423800001
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
源URL[http://119.78.100.204/handle/2XEOYT63/18001]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Chang, Chip-Hong
作者单位1.Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
2.Univ Chinese Acad Sci, Beijing 100190, Peoples R China
3.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China
4.Yale Univ, Comp Architecture & Secur Lab, New Haven, CT 06511 USA
5.Rock Solid Secur Lab, Changzhou 213000, Peoples R China
6.Hohai Univ, Coll Internet Things Engn, Changzhou 213022, Peoples R China
推荐引用方式
GB/T 7714		 Cao, Yuan,Wu, Yanze,Wang, Wen,et al. An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,2021:12.
APA Cao, Yuan.,Wu, Yanze.,Wang, Wen.,Lu, Xu.,Chen, Shuai.,...&Chang, Chip-Hong.(2021).An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,12.
MLA Cao, Yuan,et al."An Efficient Full Hardware Implementation of Extended Merkle Signature Scheme".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2021):12.

入库方式： OAI收割

来源：计算技术研究所

浏览0
下载0
收藏0
其他版本

除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。