SMS4算法在FPGA平台的高性能实现
文献类型：期刊论文
| 作者 | 赵军; 郭志川; 郭志川 |
| 刊名 | IEEE Access
 |
| 出版日期 | 2020 |
| 期号 | 未知页码:88836 |
| ISSN号 | 2169-3536 |
| DOI | 10.1109/ACCESS.2019.2923440 |
| 英文摘要 | "The SMS4 algorithm is a block cipher algorithm, which has the characteristics of high security and easy implementation. However, the optimization and implementation schemes proposed for FPGA platform currently use multi-channel parallel and pipelined architectures to improve performance, which results in a large consumption of resources, and the clock cycles taken to process a single data block is not reduced. This paper proposes a novel implementation scheme of SMS4 on FPGA. This scheme separates the generations of 32 round keys and encryption operations, 32 round keys are generated on the host computer in advance, and the encryption operations completed on the FPGA. At the same time, for the 32-round iterative structure of the SMS4, this paper proposes a dual-cascade implementation architecture that can compress 32 rounds of iterative operations from 32 clock cycles to 16 clock cycles. This greatly improves the performance of the SMS4. To compare with the previous works needing 32 cycles or more, which greatly reduces the clock cycles spent on processing each data block. The throughput achieves 1.9 Gbps at a frequency of 286 MHz on Xilinx FPGA." |
| URL标识 | 查看原文 |
| 源URL | [http://159.226.59.140/handle/311008/9571]  |
| 专题 | 历年期刊论文_2020年期刊论文 |
| 作者单位 | 中国科学院声学研究所 |
| 推荐引用方式 GB/T 7714 | 赵军；郭志川；郭志川. SMS4算法在FPGA平台的高性能实现[J]. IEEE Access,2020(未知):88836. |
| APA | 赵军；郭志川；郭志川.(2020).SMS4算法在FPGA平台的高性能实现.IEEE Access(未知),88836. |
| MLA | 赵军；郭志川；郭志川."SMS4算法在FPGA平台的高性能实现".IEEE Access .未知(2020):88836. |
入库方式： OAI收割
来源：声学研究所
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