Image detail enhancement is critical to the performance of short-wave infrared (SWIR) imaging systems. Recently, the requirement for real-time processing of high-definition (HD) SWIR video has shown rapid growth. Nevertheless, the research on field programmable gate array (FPGA) implementation of HD SWIR streaming video processing architecture is relatively few. This work proposes a real-time FPGA architecture of SWIR video enhancement by combining the difference of Gaussian filter and plateau equalization. To accelerate the algorithm and reduce memory bandwidth, two efficient key architectures, namely edge information extraction and equalization and remapping architecture, are proposed to sharpen edges and improve dynamic range. The experimental results demonstrated that the proposed architecture achieved a real-time processing of 1280 × 1024@60Hz with 2.7K lookup tables, 2.5K Slice Reg, and about 350 kb of block RAM consumption, and their utilization reached 12.5%, 19.2%, and 12.5% for the XC7A200T FPGA board, respectively. Moreover, the proposed architecture is fully pipelined and synchronized to the pixel clock of output video, meaning that it can be seamlessly integrated into diverse real-time video processing systems. © 2024 Society of Photo-Optical Instrumentation Engineers (SPIE)