The emerging AI computing system asks for high-speed, large-scale, and power-efficient interconnects. As the system scales-out reaching tens-of-meters, electrical links cannot support higher bandwidth (BW) at affordable power consumption. Silicon photonic (SiPh) technology enables the fabrication of both photonic integrated circuits (PIC) and electronic integrated circuits (EIC) on the same wafer. By integrating optical transceivers into the xPU package, fiber channels could be directly attached to the chip edge, building up the highly integrated optical-IO. SiPh micro-ring resonator (MRR) is an attractive solution due to small footprint and its capability of wavelength selection [1]-[3]. To fit more wavelengths into one full-spectral-range (FSR) of the MRR, dense wavelength-division multiplexing (DWDM) has been adopted, which brings design challenges on anti-aliasing and wavelength stabilizing. © 2024 IEEE.