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Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis

文献类型：期刊论文

作者Long, Boyu1,2; Han, Yinhe1,2; Sun, Xian-He3; Chen, Xiaoming1,2
刊名IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
出版日期2025-09-01
卷号44期号:9页码:3409-3422
关键词Logic Computer architecture Integrated circuit interconnections Hardware Routing Circuits Table lookup Decoding Performance evaluation Logic gates Processing in memory resistive random-access memory (RRAM) software-hardware co-design ternary content-addressable memory (TCAM)
ISSN号0278-0070
DOI10.1109/TCAD.2025.3541487
英文摘要The reconfigurable processing-in-memory (PIM) architecture has garnered significant attention in recent years due to its versatility and ability to overcome storage limitations. However, it faces challenges, such as overly complex mapping and routing caused by the fine granularity of basic logic units, and the inclusion of numerous redundant devices to achieve reconfigurability. To address these issues, we have designed a software-hardware co-design reconfigurable PIM architecture called Re-Meltrix. Its hardware architecture uses an resistive random-access memory array as the foundation, combined with well-designed peripheral circuits. Maintaining a controllable area, it integrates logic, storage, ternary content-address memory, and interconnection modes into a unified tile architecture and implements two-level independent interconnection within and between tiles. This approach achieves a single tile logic capacity multiple times that of the most advanced reconfigurable PIM architectures currently available, thereby resolving mapping and routing difficulties at the hardware level. Our proposed function synthesis, combined with the hardware architecture, specifically optimizes two-level interconnection separation and module segmentation, further reducing interconnection complexity and improving tile usage efficiency. Experiments have demonstrated that our architecture outperforms the state-of-the-art Liquid Silicon by 2.00- $4.31\times $ in performance and reduces power consumption by 29%-68%. Compared with the previously published Meltrix, the area has decreased by 15%-35%, with the area and power consumption remaining almost unchanged.
资助项目National Natural Science Foundation of China[62122076] ; National Natural Science Foundation of China[62025404] ; National Natural Science Foundation of China[62488101] ; National Natural Science Foundation of China[62495104] ; Youth Innovation Promotion Association CAS
WOS研究方向Computer Science ; Engineering
语种英语
WOS记录号WOS:001563972400005
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
源URL[http://119.78.100.204/handle/2XEOYT63/41738]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Chen, Xiaoming
作者单位1.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China
2.Univ Chinese Acad Sci, Sch Comp Sci & Technol, Beijing 100190, Peoples R China
3.IIT, Dept Comp Sci, Chicago, IL 60616 USA
推荐引用方式
GB/T 7714		 Long, Boyu,Han, Yinhe,Sun, Xian-He,et al. Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,2025,44(9):3409-3422.
APA Long, Boyu,Han, Yinhe,Sun, Xian-He,&Chen, Xiaoming.(2025).Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,44(9),3409-3422.
MLA Long, Boyu,et al."Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis".IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 44.9(2025):3409-3422.

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来源：计算技术研究所

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