XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards
文献类型：期刊论文
| 作者 | Wang, Kaifan1; Chen, Jian2; Xu, Yinan1; Yu, Zihao1; He, Wei3; Tang, Dan3; Sun, Ninghui1; Bao, Yungang1 |
| 刊名 | IEEE MICRO
 |
| 出版日期 | 2025-05-01 |
| 卷号 | 45期号:3页码:49-57 |
| 关键词 | Program processors Vectors Technological innovation Pipelines Microarchitecture Ecosystems Decoding Training Registers Industries |
| ISSN号 | 0272-1732 |
| DOI | 10.1109/MM.2025.3565285 |
| 英文摘要 | It is widely believed that an open source hardware ecosystem can reduce development costs and lower barriers to innovation. However, developing an open source industrial-grade high-performance processor is a challenging undertaking. For mass adoption, such an IP needs to have an advanced out-of-order microarchitecture for high performance, a robust verification infrastructure for reliable quality, and high configurability to accommodate the myriad use cases. With a best-in-class performance, XiangShan is an open source project for RISC-V processors that fully meets these requirements. To maximize overall efficiency, XiangShan adopted a collaborative hardware development model, partnering with industry on processor design, implementation, and verification. With innovations in Agile development processes and tools, the design of the processors can be evolved, optimized, and verified quickly, ensuring high quality and enabling architectural innovation and rapid commercialization. |
| 资助项目 | Strategic Priority Research Program of Chinese Academy of Sciences[XDC05030200] ; National Key R&D Program of China[2022YFB4500403] ; National Natural Science Foundation of China[62090022] ; National Natural Science Foundation of China[62172388] ; National Natural Science Foundation of China[62072433] ; Youth Innovation Promotion Association of the Chinese Academy of Sciences[2020105] ; Institute of Computing Technology (ICT) Innovation[E261100] ; Fundamental Research Funds for the Central Universities[DUT21RC(3)102] ; Fundamental Research Funds for the Central Universities[DUT21LAB302] |
| WOS研究方向 | Computer Science |
| 语种 | 英语 |
| WOS记录号 | WOS:001523482200001 |
| 出版者 | IEEE COMPUTER SOC |
| 源URL | [http://119.78.100.204/handle/2XEOYT63/42026]  |
| 专题 | 中国科学院计算技术研究所期刊论文_英文 |
| 通讯作者 | Wang, Kaifan |
| 作者单位 | 1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Processors, Beijing 100190, Peoples R China 2.Beijing Inst Open Source Chip, Beijing 100080, Peoples R China 3.Beijing Inst Open Source Chip, Beijing 100080, Peoples R China |
| 推荐引用方式 GB/T 7714 | Wang, Kaifan,Chen, Jian,Xu, Yinan,et al. XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards[J]. IEEE MICRO,2025,45(3):49-57. |
| APA | Wang, Kaifan.,Chen, Jian.,Xu, Yinan.,Yu, Zihao.,He, Wei.,...&Bao, Yungang.(2025).XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards.IEEE MICRO,45(3),49-57. |
| MLA | Wang, Kaifan,et al."XiangShan: An Open Source Project for High-Performance RISC-V Processors Meeting Industrial-Grade Standards".IEEE MICRO 45.3(2025):49-57. |
入库方式： OAI收割
来源：计算技术研究所
浏览0
下载0
收藏0
其他版本
除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。