A creative architecture for mass-sensitive transponder
文献类型：会议论文
| 作者 | Wang, Zhugang; Xie, Chunjian; Xiong, Weiming |
| 出版日期 | 2012 |
| 会议名称 | 63rd International Astronautical Congress 2012, IAC 2012 |
| 会议日期 | October 1, 2012 - October 5, 2012 |
| 会议地点 | Naples, Italy |
| 页码 | 3442-3447 |
| 中文摘要 | This article describes a much simplified, Digital and analog mixed architecture that support general S-band transponder operation. The mass is reduced to under 1.4kg (including TCXO), and the dimension is about 170 *70*100mm. The power consumption is less than 11W measured in the side of 28V input with 1W SSPA transmitter output. The mass cut down is benefit mainly from the progress of digital design techniques and the improvement of the FPGA technologies. The designer implements the IF command and tracking demodulation by a 3 million system gates FPGA. Furthermore, the device is employed with tri-mode-redundancy. The algorithm of the main carrier tracking is based on phase lock loop, the command demodulation is based on Costas loop for sub carrier tracking and DTTL loop for bit synchronization. The carrier acquisition threshold is under -128 dBm with PM/BPSK demodulation losses < 1dB. The dynamic range is from -128 dBm to -55 dBm. The second technique that decreases the complexity is the structure of RF front-side. We use a small size saturated amplifier replacing the AGC amplifier, the saturation amplifier depresses the mostly of the signal dynamic and DSP deal with the dynamic left. We select a low power A/D converter with working frequency under 3Msps in under-sampling mode; however, the IF frequency is about 9.3MHz that can diminish the order of RF front-side down converter and the difficulties of analog band pass filter design. For the standard of the USB transmitter is only support modulation type: BPSK/PM, so we build a RF-IF close loop transmitter architecture that eliminate the components used in up converter architecture, the saved mixers and band pass filters extremely reduce the amount and the volume of PCB. Moreover, we creatively put the coherent forwarding signal generator and the Frequency-Phase Detector together in FPGA. The digital phase noise or jitter is wonderfully filtered by a well-designed analog low pass loop filter. To conclude, there is not any DAC or RF-filter in transponder's transmitter loop. The other advantage is that we can adjust the modulation index easily by digital parameter. The transponder developed by NSSC is under flight verification. |
| 英文摘要 | This article describes a much simplified, Digital and analog mixed architecture that support general S-band transponder operation. The mass is reduced to under 1.4kg (including TCXO), and the dimension is about 170 *70*100mm. The power consumption is less than 11W measured in the side of 28V input with 1W SSPA transmitter output. The mass cut down is benefit mainly from the progress of digital design techniques and the improvement of the FPGA technologies. The designer implements the IF command and tracking demodulation by a 3 million system gates FPGA. Furthermore, the device is employed with tri-mode-redundancy. The algorithm of the main carrier tracking is based on phase lock loop, the command demodulation is based on Costas loop for sub carrier tracking and DTTL loop for bit synchronization. The carrier acquisition threshold is under -128 dBm with PM/BPSK demodulation losses < 1dB. The dynamic range is from -128 dBm to -55 dBm. The second technique that decreases the complexity is the structure of RF front-side. We use a small size saturated amplifier replacing the AGC amplifier, the saturation amplifier depresses the mostly of the signal dynamic and DSP deal with the dynamic left. We select a low power A/D converter with working frequency under 3Msps in under-sampling mode; however, the IF frequency is about 9.3MHz that can diminish the order of RF front-side down converter and the difficulties of analog band pass filter design. For the standard of the USB transmitter is only support modulation type: BPSK/PM, so we build a RF-IF close loop transmitter architecture that eliminate the components used in up converter architecture, the saved mixers and band pass filters extremely reduce the amount and the volume of PCB. Moreover, we creatively put the coherent forwarding signal generator and the Frequency-Phase Detector together in FPGA. The digital phase noise or jitter is wonderfully filtered by a well-designed analog low pass loop filter. To conclude, there is not any DAC or RF-filter in transponder's transmitter loop. The other advantage is that we can adjust the modulation index easily by digital parameter. The transponder developed by NSSC is under flight verification. |
| 收录类别 | EI |
| 会议主办者 | Agenzia Spaziale Italiana (ASI); Finmeccanica SpA; Sangemini S.p.A. |
| 会议录 | Proceedings of the International Astronautical Congress, IAC
 |
| 会议录出版者 | International Astronautical Federation, IAF, 94bis Avenue de Suffren, Paris, 75015, France |
| 学科主题 | 微波遥感 |
| 语种 | 英语 |
| ISSN号 | 0074-1795 |
| ISBN号 | 9781622769797 |
| 源URL | [http://ir.nssc.ac.cn/handle/122/3377]  |
| 专题 | 国家空间科学中心_空间技术部 |
| 推荐引用方式 GB/T 7714 | Wang, Zhugang,Xie, Chunjian,Xiong, Weiming. A creative architecture for mass-sensitive transponder[C]. 见:63rd International Astronautical Congress 2012, IAC 2012. Naples, Italy. October 1, 2012 - October 5, 2012. |
入库方式： OAI收割
来源：国家空间科学中心
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