中国科学院机构知识库网格系统: 检索

Development and Test of On-Line Spectroscopic System Based on Thermostatic Control Using STM32 Single-Chip Microcomputer 期刊论文 OAI收割
SPECTROSCOPY AND SPECTRAL ANALYSIS, 2023, 卷号: 43
作者: Huang Chao; Zhao Yu-hong; Zhang Hong-ming; Lu Bo; Yin Xiang-hui

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收藏 | 浏览/下载：23/0 | 提交时间：2023/11/17

On-line spectroscopic system STM32 single-chip microcomputer Proportional-integral-differential (PID) control Pctra data acquisition

Degree of Abandoned Cropland and Socioeconomic Impact Factors in China: Multi-Level Analysis Model Based on the Farmer and District/County Levels 期刊论文 OAI收割
LAND, 2022, 卷号: 11, 期号: 1, 页码: 25
作者: Jiang, Chong; Song, Wei

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收藏 | 浏览/下载：19/0 | 提交时间：2022/09/21

abandoned cropland multi-level analysis cause of abandonment CHIP data China

Degree of Abandoned Cropland and Socioeconomic Impact Factors in China: Multi-Level Analysis Model Based on the Farmer and District/County Levels 期刊论文 OAI收割
LAND, 2022, 卷号: 11, 期号: 1, 页码: 25
作者: Jiang, Chong; Song, Wei

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收藏 | 浏览/下载：22/0 | 提交时间：2022/09/21

abandoned cropland multi-level analysis cause of abandonment CHIP data China

A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration 期刊论文 OAI收割
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 4, 页码: 803-815
作者: Wu, Bi; Dai, Pengcheng; Cheng, Yuanqing; Wang, Ying; Yang, Jianlei

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收藏 | 浏览/下载：37/0 | 提交时间：2020/12/10

System-on-chip Computer architecture Magnetic tunneling Transistors Switches Thermal sensors Organizations Cache data migration low power spin transfer torque magnetic memory (STT-MRAM) thermal gradient

A novel sample delivery system based on circular motion for in situ serial synchrotron crystallography 期刊论文 OAI收割
LAB ON A CHIP, 2020, 卷号: 20, 期号: 21, 页码: 3888-3898
作者: Zhao, FZ; Sun, B; Yu, L; Xiao, QJ; Wang, ZJ

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收藏 | 浏览/下载：54/0 | 提交时间：2021/09/06

PROTEIN-STRUCTURE DETERMINATION ROOM-TEMPERATURE FEMTOSECOND CRYSTALLOGRAPHY DATA-COLLECTION CHIP MICROFLUIDICS MICROCRYSTALS MEMBRANE PLATFORM LASERS

Deterministic Replay: A Survey 期刊论文 OAI收割
ACM COMPUTING SURVEYS, 2015, 卷号: 48, 期号: 2, 页码: 47
作者: Chen, Yunji; Zhang, Shijin; Guo, Qi; Li, Ling; Wu, Ruiyang

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收藏 | 浏览/下载：36/0 | 提交时间：2019/12/13

Design Reliability Performance Security Deterministic replay debugging distributed system operating system System-on-Chip chip multiprocessor parallel system order data race

Communication synchronization in wireless optical link (EI CONFERENCE) 会议论文 OAI收割
2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012, December 7, 2012 - December 9, 2012, Shenyang, Liaoning, China
作者: Guo J.; Guo J.; Wang H.; Wang H.; Wang H.

收藏 | 浏览/下载：30/0 | 提交时间：2013/03/25

An FPGA based transceiving synchronization method is demonstrated for Free Space Optical (FSO) communication system which is discussed separately as the transmitting protocol and the receiving protocol. During the discussion of these two parts the co-operation of them is also discussed. The transmitting protocol interfaces the outer input data with a parallel port buffers the input data encodes the input data stream serializes the parallel data and outputs the serialized data. It also has an output management unit to manage the activity of each part of the transmitting protocol. The receiving protocol filters and synchronizes the input serial data stream parallels the serial data stream decodes the input data checks received error handles transmission exception and interfaces the outer receiver with a parallel port. The entire transceiving protocol could be programmed into a single FPGA chip to improve system integrity and reduce the system cost. The presented protocol could be taken as "protocol transparent" for outer interfaces meaning that when interfacing the presented system to an outer system users don't have to consider what protocol the outer system transceiving data stream is under for example the TCP/IP protocol or anything else in the case that its I/O interface is a parallel port. Simulation and final experiment prove that the protocol presented is a working solution at a certain bit rate scale. 2012 IEEE.

Design of high speed and parallel compression system used in the big area CCD of high frame frequency (EI CONFERENCE) 会议论文 OAI收割
2011 International Conference on Precision Engineering and Non-Traditional Machining, PENTM 2011, December 9, 2011 - December 11, 2011, Xi'an, China
作者: Li G.-N.

收藏 | 浏览/下载：51/0 | 提交时间：2013/03/25

According to the area CCD camera of characteristics such as high resolution capacity and high frame frequency this paper puts forward a high speed and parallel image compression system of high integration degree. Firstly according to the work principle of the area CCD FPGA is adopted to realize the timing driving and multichannel and parallel analog signal handling to raise the export frame frequency of the area CCD. Secondly with an image compression scheme based on FPGA embedded processor MicroBlaze and ADV212 compression chip real time image compression and the high speed area CCD are realized. Finally by detecting the analog signal of the area CCD output the real time compression of the big area CCD image is carried out in different compression ratios and the compression performance is analyzed. Experiment result shows that this scheme can realize real time image compression with the biggest data rate of 520Mbps. When compression bit ratio is 0.15 the signal-to-noise ratio of peak value can reach 36 dB. Image collection and image compression are integrated which reduces the data transmission between them and improves systematic integration degree.

The design of analog video data grabber system based on TMS320VC33 and SAA7111A (EI CONFERENCE) 会议论文 OAI收割
2011 International Conference on Mechatronic Science, Electric Engineering and Computer, MEC 2011, August 19, 2011 - August 22, 2011, Jilin, China
作者: Liu S.-J.

收藏 | 浏览/下载：15/0 | 提交时间：2013/03/25

Analog video data grabber system based on TMS320VC33 and SAA7111A is proposed for a kind of automatic optical alignment measuring device. System uses the enhanced video processing chip SAA7111A to complete A/D conversion. The function of SAA7111A and the register configuration method of I2C Bus are introduced in the paper. System uses FPGA to control video data grabber and collaborative work of DSP. DSP processes video data. The paper gives design method of hardware and software. Experimental results indicate that the system can satisfy the requirements. 2011 IEEE.

Precision detection of CCD splicing based on template matching algorithm (EI CONFERENCE) 会议论文 OAI收割
IEEE 2nd International Conference on Computing, Control and Industrial Engineering, CCIE 2011, August 20, 2011 - August 21, 2011, Wuhan, China
作者: Zhang X.; Zhang X.; Yang L.; Zhang X.; Yang L.

收藏 | 浏览/下载：32/0 | 提交时间：2013/03/25

The remote sensing camera in large field and wide cover needs CCD with enough pixels. But the existing CCD cannot satisfy the practical needs. Therefore several pieces of CCD which has insufficient pixels are spliced to get a long CCD array with plenty of pixels. The precision requirements of CCD splicing are very strict so that the same high accuracies are required in the precision detection of CCD splicing. When detecting precision of CCD splicing the graphical markers with simple geometric structure in the CCD package are selected as templates. The position precision data of the graphical markers in each CCD are obtained using the template matching algorithm. Using the unified objective templates the focal plane which has multi-chip of CCD is detected by template matching algorithm. Experiment results show that the template matching algorithm can enhance the located precision of each CCD to 0.347m. The splicing precision detection with template matching algorithm can avoid the subjective error caused by the conventional detection method. And its results are more accurate. In addition without manual intervention in the process of precision detection the efficiency of precision detection is improved. 2011 IEEE.