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CAS IR Grid
机构
长春光学精密机械与物... [1]
上海光学精密机械研究... [1]
采集方式
OAI收割 [2]
内容类型
会议论文 [1]
期刊论文 [1]
发表日期
2008 [1]
2006 [1]
学科主题
激光器;固体激光器 [1]
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侧面抽运国产Nd∶YAG陶瓷棒的激光特性
期刊论文
OAI收割
中国激光, 2008, 卷号: 35, 期号: 12, 页码: 2001, 2004
唐昊
;
朱小磊
;
姜本学
;
潘裕柏
收藏
  |  
浏览/下载:1522/238
  |  
提交时间:2009/09/18
激光器
Atomic percents
Nd:YAG陶瓷
Average powers
激光二极管阵列
Beam divergence angles
侧面抽运
Laser diode array
被动调Q
Nd:YAG ceramic
Nd:yag ceramic lasers
Output couplers
Output performances
Passively Q-switched
Pulse widths
Side pump
Slope efficiencies
Transmission ratios
Wave outputs
Working frequencies
Yag crystals
Chip design of linear CCD drive pulse generator and control interface (EI CONFERENCE)
会议论文
OAI收割
2nd International Symposium on Advanced Optical Manufacturing and Testing Technologies - Advanced Optical Manufacturing and Testing Technologies, November 2, 2005 - November 5, 2005, Xian, China
作者:
Sun H.
;
Wang Y.
;
Wang Y.
;
Wang Y.
;
Wang Y.
收藏
  |  
浏览/下载:30/0
  |  
提交时间:2013/03/25
CCD noises and their causes are analyzed. Methods to control these noises
such as Correlated Double Sampling (CDS)
filtering
cooling
clamping
and calibration are proposed. To improve CCD sensor's performances
the IC
called Analog Front End (AFE)
integration of CDS
clamping
Programmable Gain Amplifier (PGA)
offset
and ADC
which can fulfill the CDS and analog-to-digital conversion
is employed to process the output signal of CCD. Based on the noise control approaches
the idea of chip design of linear CCD drive pulse generator and control interface is introduced. The chip designed is playing the role of (1) drive pulse generator
for both CCD and AFE
and (2) interface
helping to analysis and transfer control command and status information between MCU controller and drive pulse generator
or between global control unit in the chip and CCD/AFE. There are 6 function blocks in the chip designed
such as clock generator for CCD and AFE
MCU interface
AFE serial interface
output interface
CCD antiblooming parameter register and global control logic unit. These functions are implemented in a CPLD chip
Xilinx XC2C256-6-VQ100
with 20MHz pixel frequency
and 16-bit high resolution. This chip with the AFE can eliminate CCD noise largely and improve the SNR of CCD camera. At last
the design result is presented.