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	Time Information Transmission Based on FM Broadcast Signal 期刊论文 OAI收割 IEEE ACCESS, 2021, 卷号: 9, 页码: 16360-16364 作者: Hu, Zhaopeng; Li, Shifeng; Xiang, Yu \| 收藏 \| 浏览/下载：20/0 \| 提交时间：2021/11/29 Additional channel FM radio spreading code timing
	A timing detector with pulsed high-voltage power supply for mass measurements at CSRe 期刊论文 OAI收割 NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2014, 卷号: 755, 页码: 38-43 作者: Zhang, W; Tu, XL; Wang, M; Zhang, YH; Xu, HS \| 收藏 \| 浏览/下载：30/0 \| 提交时间：2017/03/28 Storage Ring Mass Spectrometry Isochronous Mass Spectrometry Timing Detectors Micro-channel Plates Saturation Effects
	improving performance of network covert timing channel through huffman coding 期刊论文 OAI收割 Mathematical and Computer Modelling, 2011, 卷号: 55, 期号: 1-2, 页码: 69-79 Jingzheng Wu; Yongji Wang; Liping Ding; Xiaofeng Liao \| 收藏 \| 浏览/下载：36/0 \| 提交时间：2013/10/08 Huffman coding Network covert channel Covert channel encoding Capacity Covertness Timing channel
	Design of driving circuit for binocular CCD image system (EI CONFERENCE) 会议论文 OAI收割 5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Detector, Imager, Display, and Energy Conversion Technology, April 26, 2010 - April 29, 2010, Dalian, China 作者: Zhang X.; Zhang X.; Zhang X. 收藏 \| 浏览/下载：47/0 \| 提交时间：2013/03/25 The paper designs a driving circuit of high sensitive wide dynamic and high signal-to-noise ratio for binocular CCD imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Inner structure and driving timing of the FTF5066M sensor are presented. Field Programmable Gate Array (FPGA) is used as the main device to accomplish the timing design of the circuits and power driver control of the two sensors. By using the Correlated Double Sampling (CDS) technique the video noise is reduced and the SNR of the system is increased. A 12- bit A/D converter is used to improve the image quality. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel. For its good performance low power consumption and small volume the driving system can be applied to aeronautics and astronautics field. With a further improvement a maximum data output rate of 2.7 frames per second can be reached through all the eight channels of the two CCDs. 2010 Copyright SPIE - The International Society for Optical Engineering.
	Driving and image enhancement for CCD sensing image system (EI CONFERENCE) 会议论文 OAI收割 2010 3rd IEEE International Conference on Computer Science and Information Technology, ICCSIT 2010, July 9, 2010 - July 11, 2010, Chengdu, China Zhang M.; Ren J. 收藏 \| 浏览/下载：37/0 \| 提交时间：2013/03/25 The paper designs a driving circuit of high sensitive wide dynamic for CCD sensing imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Field Programmable Gate Array (FPGA) is used as the main device to accomplish the timing design of the circuits and power driver control of the sensor. By using the Correlated Double Sampling (CDS) technique the video noise is reduced and the SNR of the system is increased. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel output. We use the histogram specification to adjust the brightness of the captured image. And then use the median filtering to suppress the noise. The traditional gray mean gradient (GMG) and the objective evaluation method based on Human Visual System (HVS) used to verify the effect of image enhancement. 2010 IEEE.
	A multi-channel, area-efficient, audio sampling rate interpolator (EI CONFERENCE) 会议论文 OAI收割 2009 8th IEEE International Conference on ASIC, ASICON 2009, October 20, 2009 - October 23, 2009, Changsha, China 作者: Wang D. 收藏 \| 浏览/下载：35/0 \| 提交时间：2013/03/25 The area and power consumption of sampled rate converter are governed largely by associated digital interpolationfilters. This paper presents a novel multi-channel area-efficient audio sampling rate interpolator whose conversion ratio is 1:2 and 1:4. Several architectural and implementation features reduces the complexity of the filter and allow its realization in a die area of 0.032mm2 in 0.18 m technology meanwhile timing multiplexer scheme reduces clock frequency to minimum. Experiments show proposed methods could not only saved hardware resources but also reduce power consumption so it is very suitable for consumer electronics. 2009 IEEE.