中国科学院机构知识库网格系统: 检索

End-to-end learning interpolation for object tracking in low frame-rate video 期刊论文 OAI收割
IET Image Processing, 2020, 卷号: 14, 期号: 6, 页码: 1066-1072
作者: Liu, Liqiang; Cao, Jianzhong

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收藏 | 浏览/下载：66/0 | 提交时间：2020/05/20

video signal processing learning (artificial intelligence) object tracking interpolation mobile computing low frame rates implicit video frame interpolation sub-network object tracking low frame-rate video high frame-rate latent video effective end-to-end optimisation frame rate tracking accuracy semantic video analytics end-to-end learning interpolation subsequent semantic analytics bandwidth constraints analytics performance

A Hardware-Oriented Algorithm for Ultra-High-Speed Object Detection 期刊论文 OAI收割
IEEE SENSORS JOURNAL, 2019, 卷号: 19, 期号: 10, 页码: 3818-3831
作者: Li, Jianquan; Liu, Xilong; Liu, Fangfang; Xu, De; Gu, Qingyi

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收藏 | 浏览/下载：75/0 | 提交时间：2019/07/12

Hardware implementation high-frame-rate vision field-programmable gate array multi-object detection histograms of oriented gradient support vector machine

Performance analysis of DDR SDRAM in high speed image data acquisition 会议论文 OAI收割
San Diego, CA, United states, 2019-08-12
作者: Wang, Yan; Chen, Xiaolai

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收藏 | 浏览/下载：33/0 | 提交时间：2020/03/04

high speed image data acquisition high frame rate DDR SDRAM performance analysis performance evaluation

A WEAK MOVING POINT TARGET DETECTION METHOD BASED ON HIGH FRAME RATE IMAGE SEQUENCES 会议论文 OAI收割
Valencia, SPAIN, JUL 22-27, 2018
作者: Wu, Yong; Yang, Zheng; Niu, Wenlong; Zheng, Wei

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收藏 | 浏览/下载：32/0 | 提交时间：2019/01/31

kernel high frame rate wavelet packet moving point target signal detection

HIGH FRAME-RATE BASED MOVING POINT TARGET DETECTION 会议论文 OAI收割
Valencia, SPAIN, JUL 22-27, 2018
作者: Niu, Wenlong; Wu, Yong; Zheng, Wei; Yang, Zhen; Vagvolgyi, Balazs

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收藏 | 浏览/下载：26/0 | 提交时间：2019/01/31

Moving point target detection framework time series target detector high frame-rate

HEPS-BPIX, a single photon counting pixel detector with a high frame rate for the HEPS project 期刊论文 OAI收割
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2016, 卷号: 835, 页码: 169
作者: Wei W(魏微); Zhang J(张杰); Ning Z(宁哲); Lu YP(卢云鹏); Fan L(樊磊)

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收藏 | 浏览/下载：37/0 | 提交时间：2017/07/27

Pixel detector Single photon counting High frame rate Synchrotron radiation X-ray imaging HEPS

Design of high speed and parallel compression system used in the big area CCD of high frame frequency (EI CONFERENCE) 会议论文 OAI收割
2011 International Conference on Precision Engineering and Non-Traditional Machining, PENTM 2011, December 9, 2011 - December 11, 2011, Xi'an, China
作者: Li G.-N.; Jin L.-X.; Zhang R.-F.; Wang W.-H.; Li G.-N.

收藏 | 浏览/下载：51/0 | 提交时间：2013/03/25

According to the area CCD camera of characteristics such as high resolution capacity and high frame frequency this paper puts forward a high speed and parallel image compression system of high integration degree. Firstly according to the work principle of the area CCD FPGA is adopted to realize the timing driving and multichannel and parallel analog signal handling to raise the export frame frequency of the area CCD. Secondly with an image compression scheme based on FPGA embedded processor MicroBlaze and ADV212 compression chip real time image compression and the high speed area CCD are realized. Finally by detecting the analog signal of the area CCD output the real time compression of the big area CCD image is carried out in different compression ratios and the compression performance is analyzed. Experiment result shows that this scheme can realize real time image compression with the biggest data rate of 520Mbps. When compression bit ratio is 0.15 the signal-to-noise ratio of peak value can reach 36 dB. Image collection and image compression are integrated which reduces the data transmission between them and improves systematic integration degree.

A new approach to realize UART (EI CONFERENCE) 会议论文 OAI收割
2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China
作者: Wang Y.; Wang Y.; Wang Y.; Wang Y.; Wang Y.

收藏 | 浏览/下载：33/0 | 提交时间：2013/03/25

In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol a method to implement UART communications based on programmable logic device is proposed in the paper. In the proposed method the core function of UART is integrated in CPLD with VHDL. Firstly UART data frame format and operational principle of UART were introduced after reviewing some methods to realize UART. The methods to implement UART transmitter UART receiver and baudrate generator using VHDL were illustrated in detail. Then pre-simulation and synthesize of VHDL program were executed. Finally the test with bit error rate was carried out on physical system. Experimental results indicate that 75 percent of the GLB are used by UART and the bit error rate is less than 109. The experiment was implemented utilizing the RS-422 protocol and the baudrate is 62.5kb/s. The proposed method can satisfy the system requirements of high integration stabilization low bit error rate strong anti-jamming and low cost. 2011 IEEE.

Design of driving circuit for binocular CCD image system (EI CONFERENCE) 会议论文 OAI收割
5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Detector, Imager, Display, and Energy Conversion Technology, April 26, 2010 - April 29, 2010, Dalian, China
作者: Zhang X.; Zhang X.; Zhang X.

收藏 | 浏览/下载：42/0 | 提交时间：2013/03/25

The paper designs a driving circuit of high sensitive wide dynamic and high signal-to-noise ratio for binocular CCD imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Inner structure and driving timing of the FTF5066M sensor are presented. Field Programmable Gate Array (FPGA) is used as the main device to accomplish the timing design of the circuits and power driver control of the two sensors. By using the Correlated Double Sampling (CDS) technique the video noise is reduced and the SNR of the system is increased. A 12- bit A/D converter is used to improve the image quality. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel. For its good performance low power consumption and small volume the driving system can be applied to aeronautics and astronautics field. With a further improvement a maximum data output rate of 2.7 frames per second can be reached through all the eight channels of the two CCDs. 2010 Copyright SPIE - The International Society for Optical Engineering.

Panoramic aerial camera image motion measurement using a hybrid system (EI CONFERENCE) 会议论文 OAI收割
2010 3rd IEEE International Conference on Computer Science and Information Technology, ICCSIT 2010, July 9, 2010 - July 11, 2010, Chengdu, China
作者: Jia P.

收藏 | 浏览/下载：27/0 | 提交时间：2013/03/25

Image motion compensation is significantly important for aerial camera photograph. To execute the compensation we must determine the image motion exactly. This paper proposes a method of real-time image motion measurement for panoramic aerial cameras based on image processing using a hybrid system. Two cameras are simultaneously used in the hybrid system. One main linear CCD for imaging while the other auxiliary low resolution high frame rate area CCD for determining the image motion based on 2D spatial correlation. The demanding computational requirements for the real-time 2D spatial correlation are covered by a joint transform optical correlator. Simulation test results show that the accuracy is improved and the measurement error is within 0.2 pixels for input images with SNR=1 dB. 2010 IEEE.