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Technology of USB HOST applying in traffic controller based on ISP1161A (EI CONFERENCE) 会议论文  OAI收割
2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China
Haibo L.; Song K.
收藏  |  浏览/下载:20/0  |  提交时间:2013/03/25
Control and management of the urban traffic signal is an problem that modern city has to face. The traffic signal controller makes a great contribution to the improvement of traffic status and the reduction of traffic jam. A traffic controller is designed using the technology of USB host based on ISP1161A. Universal serial bus is new interface bus architecture for PC  which supports the PnP function Of PC peripheral equipments and has been widely used in computer and communicational devices. ISP1161A complies with the protocol of USB1.1  and is used as the core part of the system. As a new try  the USB host technology is applied into the design of controller to implement the communication with PC. Configuration of scheme is carried out successfully. The USB host technology makes configuration of scheme and future update easier and more convenient. 2011 IEEE.  
The research of space telescope CCD camera image resource simulative system 会议论文  OAI收割
2011 international conference on electronics and optoelectronics, iceoe 2011, dalian, china, july 29, 2011 - july 31, 2011
作者:  
YangZuoting;  Yang Zuoting;  RuanPing
收藏  |  浏览/下载:19/0  |  提交时间:2012/07/09
The design of high-speed optical fiber communication system based on PCI bus (EI CONFERENCE) 会议论文  OAI收割
2010 2nd IEEE International Conference on Advanced Management Science, ICAMS 2010, July 9, 2010 - July 11, 2010, Chengdu, China
作者:  
Zhang L.-G.;  Zhang L.-G.;  He X.
收藏  |  浏览/下载:57/0  |  提交时间:2013/03/25
In order to increase the transmission distance and reduce noise effectively  a communication system with the optical fiber interface is developed in this paper. In the system  the PCI bus is adopted as the connection bus between the underlying optical fiber transceiver module circuitry and host computer using the WDM driver. The FPGA is the core logic of the whole system  responsible for data transmission and timing logic control. The module structure and the design method of the PCI bus  the principle and the design of optical interface module and the bottom-driven development are described in this paper. The experiment results show that the system has basically meet requirement targets. It can achieve the maximum transfer rate of 40MBps when running in the DMA mode. With long transmission distance  strong antiinterference and high scalability  this system has stable and reliable performance. 2010 IEEE.