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	Consideration of GLONASS Inter-Frequency Code Biases in Precise Point Positioning (PPP) International Time Transfer 期刊论文 OAI收割 APPLIED SCIENCES-BASEL, 2018, 卷号: 8, 期号: 8, 页码: 19 作者: Ge, Yulong; Qin, WeiJin; Cao, Xinyun; Zhou, Feng; Wang, Shengli \| 收藏 \| 浏览/下载：26/0 \| 提交时间：2021/11/29 precise point positioning (PPP) international time transfer GLONASS inter-frequency code biases (IFCBs)
	Research on radiometric calibration of interline transfer CCD camera based on TDI working mode (EI CONFERENCE) 会议论文 OAI收割 5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test and Measurement Technology and Equipment, April 26, 2010 - April 29, 2010, Dalian, China 作者: Liu J.-G.; Wu X.-X. 收藏 \| 浏览/下载：46/0 \| 提交时间：2013/03/25 Interline transfer CCD camera can be designed to work in time delay and integration mode similar to TDI CCD to obtain higher responsivity and spatial resolution under poor illumination condition. However it was found that outputs of some pixels were much lower than others' as interline transfer CCD camera work in TDI mode in laboratory radiometric calibration experiments. As a result photo response non-uniformity(PRNU) and signal noise ratio(SNR) of the system turned for the worse. This phenomenon's mechanism was analyzed and improved PRNU and SNR algorithms of interline transfer CCD camera were advanced to solve this problem. In this way TDI stage was used as a variant in PRNU and SNR algorithms and system performance was improved observably with few influences on use. In validation experiments the improved algorithms was applied in radiometric calibration of a camera with KAI-0340s as detector. Results of validation experiments proved that the improved algorithms could effectively improve SNR and lower PRNU of the system. At the same time characteristic of the system could be reflected better. As working in 16 TDI stages PRUN was reduced from 2.25% to 0.82% and SNR was improved about 2%. 2010 Copyright SPIE - The International Society for Optical Engineering.
	Real-time video compressing under DSP/BIOS (EI CONFERENCE) 会议论文 OAI收割 MIPPR 2009 - Medical Imaging, Parallel Processing of Images, and Optimization Techniques: 6th International Symposium on Multispectral Image Processing and Pattern Recognition, October 30, 2009 - November 1, 2009, Yichang, China Chen Q.-P.; Li G.-J. 收藏 \| 浏览/下载：38/0 \| 提交时间：2013/03/25 This paper presents real-time MPEG-4 Simple Profile video compressing based on the DSP processor. The programming framework of video compressing is constructed using TMS320C6416 Microprocessor the architecture level optimizations are used to improve software pipeline. The system used DSP/BIOS to realize multi-thread scheduling. The whole system realizes high speed transition of a great deal of data. Experimental results show the encoder can realize real-time encoding of 768*576 TDS510 simulator and PC. It uses embedded real-time operating system DSP/BIOS and the API functions to build periodic function 25 frame/s video images. 2009 Copyright SPIE - The International Society for Optical Engineering. tasks and interruptions etcs. Realize real-time video compressing. To the questions of data transferring among the system. Based on the architecture of the C64x DSP utilized double buffer switched and EDMA data transfer controller to transit data from external memory to internal and realize data transition and processing at the same time