Gate patterning in 14 nm and beyond nodes: from planar devices to three dimensional Finfet devicesLingkuan
文献类型：期刊论文
| 作者 | Meng LK(孟令款); Hong PZ(洪培真) ; He XB(贺晓彬); Li CL(李春龙); Li JJ(李俊杰); Li JF(李俊峰); Zhao C(赵超); Wei YY(韦亚一); Yan J(闫江)
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| 刊名 | Applied Surface Science
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| 出版日期 | 2016-11-15 |
| 文献子类 | 期刊论文 |
| 英文摘要 | In this work, we investigated the challenges encountered in 14 nm node Finfet gate patterning. The patterning process was originated from a 22 nm planar device, in which a SiO2/Si3N4/SiO2(ONO) multilayer was used as an etch mask. To accommodate with the 3D nature of Finfet structures in 14 nm node, thethickness of Si3N4 has been increased in the investigated process. We found out that the standard ONO mask etch process was no longer effective for gate patterning in 3D Finfet devices. |
| 源URL | [http://159.226.55.106/handle/172511/16218]  |
| 专题 | 微电子研究所_集成电路先导工艺研发中心 |
| 作者单位 | 中国科学院微电子研究所 |
| 推荐引用方式 GB/T 7714 | Meng LK,Hong PZ,He XB,et al. Gate patterning in 14 nm and beyond nodes: from planar devices to three dimensional Finfet devicesLingkuan[J]. Applied Surface Science,2016. |
| APA | Meng LK.,Hong PZ.,He XB.,Li CL.,Li JJ.,...&Yan J.(2016).Gate patterning in 14 nm and beyond nodes: from planar devices to three dimensional Finfet devicesLingkuan.Applied Surface Science. |
| MLA | Meng LK,et al."Gate patterning in 14 nm and beyond nodes: from planar devices to three dimensional Finfet devicesLingkuan".Applied Surface Science (2016). |
入库方式： OAI收割
来源：微电子研究所
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