Design of (2, 1, N) parallel convolutional encodes for VLSI
文献类型：会议论文
| 作者 | Duan MQ(段茂强) ; Huang XL(黄晓莉)
|
| 出版日期 | 2013 |
| 会议名称 | 2013 International Conference on Mechatronics and Industrial Informatics, ICMII 2013 |
| 会议日期 | March 13-14, 2013 |
| 会议地点 | Guangzhou, China |
| 关键词 | CMOS integrated circuits Encoding (symbols) Information science Low power electronics Parallel architectures Parallel processing systems Shift registers |
| 页码 | 2822-2827 |
| 中文摘要 | The characters of more high speed computing and much less low power dissipation are needed to settle for convolutional encodes. In this paper, we present a parallel method for convolutional encodes with SMIC 0.35μm CMOS technology; hardware design and VLSI implementation of this algorithm are also presented. Use this method, parallel circuits structure can be easily designed, which take on excellent characters of more high speed computing and low power dissipation compared with traditional serial shift register structure for convolutional encodes. © (2013) Trans Tech Publications, Switzerland. |
| 收录类别 | EI ; CPCI（ISTP） |
| 产权排序 | 1 |
| 会议主办者 | Korea Maritime University; Hong Kong Industrial Technology Research Centre |
| 会议录 | Applied Mechanics and Materials
 |
| 会议录出版者 | Trans Tech Publications Ltd |
| 会议录出版地 | Zurich-Durnten, Switzerland |
| 语种 | 英语 |
| ISSN号 | 1660-9336 |
| ISBN号 | 978-3-03785-694-9 |
| WOS记录号 | WOS:000324348201255 |
| 源URL | [http://ir.sia.cn/handle/173321/12424]  |
| 专题 | 沈阳自动化研究所_工业控制网络与系统研究室 |
| 推荐引用方式 GB/T 7714 | Duan MQ,Huang XL. Design of (2, 1, N) parallel convolutional encodes for VLSI[C]. 见:2013 International Conference on Mechatronics and Industrial Informatics, ICMII 2013. Guangzhou, China. March 13-14, 2013. |
入库方式： OAI收割
来源：沈阳自动化研究所
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