CTIA型读出电路结构优化研究
文献类型：期刊论文
| 作者 | 史泽林 ; 王霄
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| 刊名 | 微电子学与计算机
 |
| 出版日期 | 2014 |
| 卷号 | 31期号:11页码:64-68 |
| 关键词 | 读出电路 cascode积分器 红外辐射 噪声 信噪比 |
| ISSN号 | 1000-7180 |
| 其他题名 | Research on Optimization of CTIA ROIC Structure |
| 产权排序 | 1 |
| 中文摘要 | 为了提高不同波段红外读出电路的探测能力,优化了Cascode CTIA型读出电路中各MOS管和电容.首先给出了由cascode积分器、源级跟随结构缓冲器和采样保持电路构成的CTIA读出电路结构,逐级建立了噪声模型,分析了MOS管、积分电容、带宽限制电容和采样保持电容对噪声的影响,得出三个重要结论:(1)适当的MOS管跨导比会有效地抑制其带来的噪声,最低噪声与带宽限制电容有关,约为其KTC噪声的2/3;(2)带宽限制电容和采样保持电容取值越接近,读出电路噪声越小;(3)短波和中波红外辐射特性的差异导致三个设计电容的最优取值相差较大.在典型应用条件下,达到最佳信噪比的中波积分电容为1.7pF,短波... |
| 英文摘要 | To improve the ability of detectivity for infrared detectors with different wavebands,a cascode CTIA ROIC composed of mosfets and capacitors is optimized. Firstly the ROIC which consists of cascode integrator, sourse follower and sample hold circuit is given. The noise model is built stage by stage, the effect on the noise due to the mosfet integration capacitor bandwith limited capacitor and SH capacitor is analyzed.Three significant conclusion has arrived: (1)proper gm design could effectivly suppress the noise of mosfet,which resulting to the lowest value,approximately 2/3KTC noise of bandwith capacitor; (2) the closer the values between intergrator capacitor and SH capacitor,the lower noise the ROIC has; (3)the difference of radiation characterisic between the midwave infrared and shortwave infrared leads to the giant diversity of the designing value of intergator capacitor, focusing on the typical application,the best value of integrator capcitors are 1.7pF and 0.76pF for midwave and shortwave respectively. |
| 收录类别 | CSCD |
| 语种 | 中文 |
| CSCD记录号 | CSCD:5297338 |
| 公开日期 | 2014-11-29 |
| 源URL | [http://ir.sia.ac.cn/handle/173321/15301]  |
| 专题 | 沈阳自动化研究所_光电信息技术研究室 |
| 通讯作者 | 王霄 |
| 推荐引用方式 GB/T 7714 | 史泽林,王霄. CTIA型读出电路结构优化研究[J]. 微电子学与计算机,2014,31(11):64-68. |
| APA | 史泽林,&王霄.(2014).CTIA型读出电路结构优化研究.微电子学与计算机,31(11),64-68. |
| MLA | 史泽林,et al."CTIA型读出电路结构优化研究".微电子学与计算机 31.11(2014):64-68. |
入库方式： OAI收割
来源：沈阳自动化研究所
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