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Research on optimizing the controller configuration for high-power supply control system in nuclear fusion based on hybrid algorithm WOA-IAPSO 期刊论文  OAI收割
FUSION ENGINEERING AND DESIGN, 2024, 卷号: 205
作者:  Zhang, Ling;  Jiang, Li;  Gao, Ge
  |  收藏  |  浏览/下载：8/0  |  提交时间：2024/11/22
Fast scenario design for alternative magnetic diverted discharge on EAST 期刊论文  OAI收割
FUSION ENGINEERING AND DESIGN, 2020, 卷号: 157
作者:  
  |  收藏  |  浏览/下载：33/0  |  提交时间：2020/10/23
The research of round raster readheads scheme (EI CONFERENCE) 会议论文  OAI收割
3rd international Conference on Manufacturing Science and Engineering, ICMSE 2012, March 27, 2012 - March 29, 2012, Xiamen, China
Cong J.-F.
收藏  |  浏览/下载：31/0  |  提交时间：2013/03/25
The sequence measurement system of the IR camera (EI CONFERENCE) 会议论文  OAI收割
International Symposium on Photoelectronic Detection and Imaging 2011: Advances in Infrared Imaging and Applications, May 24, 2011 - May 24, 2011, Beijing, China
作者:  Zhang H.-B.;  Han H.-X.;  Geng A.-H.
收藏  |  浏览/下载：36/0  |  提交时间：2013/03/25
Currently  the IR cameras are broadly used in the optic-electronic tracking  optic-electronic measuring  fire control and optic-electronic countermeasure field  but the output sequence of the most presently applied IR cameras in the project is complex and the giving sequence documents from the leave factory are not detailed. Aiming at the requirement that the continuous image transmission and image procession system need the detailed sequence of the IR cameras  the sequence measurement system of the IR camera is designed  and the detailed sequence measurement way of the applied IR camera is carried out. The FPGA programming combined with the SignalTap online observation way has been applied in the sequence measurement system  and the precise sequence of the IR camera's output signal has been achieved  the detailed document of the IR camera has been supplied to the continuous image transmission system  image processing system and etc. The sequence measurement system of the IR camera includes CameraLink input interface part  LVDS input interface part  FPGA part  CameraLink output interface part and etc  thereinto the FPGA part is the key composed part in the sequence measurement system. Both the video signal of the CmaeraLink style and the video signal of LVDS style can be accepted by the sequence measurement system  and because the image processing card and image memory card always use the CameraLink interface as its input interface style  the output signal style of the sequence measurement system has been designed into CameraLink interface. The sequence measurement system does the IR camera's sequence measurement work and meanwhile does the interface transmission work to some cameras. Inside the FPGA of the sequence measurement system  the sequence measurement program  the pixel clock modification  the SignalTap file configuration and the SignalTap online observation has been integrated to realize the precise measurement to the IR camera. Te sequence measurement program written by the verilog language combining the SignalTap tool on line observation can count the line numbers in one frame  pixel numbers in one line and meanwhile account the line offset and row offset of the image. Aiming at the complex sequence of the IR camera's output signal  the sequence measurement system of the IR camera accurately measures the sequence of the project applied camera  supplies the detailed sequence document to the continuous system such as image processing system and image transmission system and gives out the concrete parameters of the fval  lval  pixclk  line offset and row offset. The experiment shows that the sequence measurement system of the IR camera can get the precise sequence measurement result and works stably  laying foundation for the continuous system. 2011 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE).  
Design of motion adjusting system for space camera based on ultrasonic motor (EI CONFERENCE) 会议论文  OAI收割
International Symposium on Photoelectronic Detection and Imaging 2011: Space Exploration Technologies and Applications, May 24, 2011 - May 26, 2011, Beijing, China
作者:  Sun Z.
收藏  |  浏览/下载：85/0  |  提交时间：2013/03/25
Drift angle is a transverse intersection angle of vector of image motion of the space camera. Adjusting the angle could reduce the influence on image quality. Ultrasonic motor (USM) is a new type of actuator using ultrasonic wave stimulated by piezoelectric ceramics. They have many advantages in comparison with conventional electromagnetic motors. In this paper  some improvement was designed for control system of drift adjusting mechanism. Based on ultrasonic motor T-60 was designed the drift adjusting system  which is composed of the drift adjusting mechanical frame  the ultrasonic motor  the driver of Ultrasonic Motor  the photoelectric encoder and the drift adjusting controller. The TMS320F28335 DSP was adopted as the calculation and control processor  photoelectric encoder was used as sensor of position closed loop system and the voltage driving circuit designed as generator of ultrasonic wave. It was built the mathematic model of drive circuit of the ultrasonic motor T-60 using matlab modules. In order to verify the validity of the drift adjusting system  was introduced the source of the disturbance  and made simulation analysis. It designed the control systems of motor drive for drift adjusting system with the improved PID control. The drift angle adjusting system has such advantages as the small space  simple configuration  high position control precision  fine repeatability  self locking property and low powers. It showed that the system could accomplish the mission of drift angle adjusting excellent. 2011 SPIE.  
The design of analog video data grabber system based on TMS320VC33 and SAA7111A (EI CONFERENCE) 会议论文  OAI收割
2011 International Conference on Mechatronic Science, Electric Engineering and Computer, MEC 2011, August 19, 2011 - August 22, 2011, Jilin, China
作者:  Liu S.-J.
收藏  |  浏览/下载：15/0  |  提交时间：2013/03/25
Technology of USB HOST applying in traffic controller based on ISP1161A (EI CONFERENCE) 会议论文  OAI收割
2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China
Haibo L.; Song K.
收藏  |  浏览/下载：20/0  |  提交时间：2013/03/25
Control and management of the urban traffic signal is an problem that modern city has to face. The traffic signal controller makes a great contribution to the improvement of traffic status and the reduction of traffic jam. A traffic controller is designed using the technology of USB host based on ISP1161A. Universal serial bus is new interface bus architecture for PC  which supports the PnP function Of PC peripheral equipments and has been widely used in computer and communicational devices. ISP1161A complies with the protocol of USB1.1  and is used as the core part of the system. As a new try  the USB host technology is applied into the design of controller to implement the communication with PC. Configuration of scheme is carried out successfully. The USB host technology makes configuration of scheme and future update easier and more convenient. 2011 IEEE.  
Analysis of inertia dyadic uncertainty for small agile satellite with control moment gyros (EI CONFERENCE) 会议论文  OAI收割
2010 IEEE International Conference on Mechatronics and Automation, ICMA 2010, August 4, 2010 - August 7, 2010, Xi'an, China
作者:  
收藏  |  浏览/下载：20/0  |  提交时间：2013/03/25
With the increasing demands for the agility of the next earth imaging satellite  control moment gyro (CMG) is considered to be the most suitable actuator because of its torque amplification capability. However  a CMG system may introduce uncertainty of inertia dyadic to a satellite's attitude control system. The uncertainty is negligible for large space vehicles  but it has not been tested whether it can be ignored for small agile satellites. How to model the CMG system inertia dyadic varying with gimbal angles  and what influence it will put on the performance of attitude control system haven't been test accurately as well. All of them are dealt with mathematically and accurately in this paper. This paper firstly gives mathematic descriptions of the inertia dyadic of the 4-CMG pyramid configuration system  varying with gimbal angles  and then designs a variable structure control law for small agile satellite using CMGs. Finally  numerical simulation suggests that the inertia dyadic variation of a 4-CMG pyramid configuration system is approximately centesimal of the total inertia dyadic of the satellite  and that the designed variable structure control law is of good robust performance for an example of large-angle attitude maneuver  despite of the variation of the inertia dyadic. 2010 IEEE.  
基于观测器的网络化控制系统故障检测 学位论文  OAI收割
工学博士, 中国科学院自动化研究所: 中国科学院研究生院, 2006
作者:  陈煜强
收藏  |  浏览/下载：69/0  |  提交时间：2015/09/02
Design and implementation of high-speed digital CMOS camera driving control timing and data interface (EI CONFERENCE) 会议论文  OAI收割
Sixth International Symposium on Instrumentation and Control Technology: Sensors, Automatic Measurement, Control and Computer Simulation, October 13, 2006 - October 15, 2006, Beijing, China
作者:  Wang Y.;  Wang Y.;  Wang Y.;  Sun H.;  Sun H.
收藏  |  浏览/下载：39/0  |  提交时间：2013/03/25
High-speed digital cameras are progressing rapidly with the development of CMOS image sensor in these few years. In order to develop a high-speed CMOS industrial digital camera  the CMOS image sensor MI-MV13 is used. The sensor drive pulse and control timing based on Xilinx Virtex-II Pro FPGA is designed. A novel format of digital image transporting based on Camera Link data port is defined in this paper. It is implemented 1280 (H) 1024 (V) SXGA resolution digital image transported at a high frame rate of 300 fps (frames-per-second) with 5 Pixels 10 bit compatible Camera Link Medium Configuration. In addition  these functions that adjustments of exposure beginning time  integral time  AOI (Area of Interest) output and so on  are realized in a FPGA chip. All of the function modules are embedded in a SOPC (System on a Programmable Chip)  and further functions can be easily added to the chip at the second time development. Experimental results show that the design of driving control timing and data interface in FPGA is suitable for high-frame rate  low power  intelligent and miniaturization digital video camera.