机构

• 长春光学精密机械与物... [5]
• 计算技术研究所 [3]
• 地质与地球物理研究所 [2]
• 自动化研究所 [2]
• 软件研究所 [2]
• 上海微系统与信息技术... [1]
• 更多

采集方式

• OAI收割 [16]

内容类型

• 期刊论文 [9]
• 会议论文 [5]
• 学位论文 [2]

发表日期

• 2023 [1]
• 2022 [1]
• 2019 [1]
• 2015 [1]
• 2012 [2]
• 2010 [2]
• 更多

学科主题

• Computer S... [1]
• Engineerin... [1]

筛选

浏览/检索结果: 共16条，第1-10条 帮助 条数/页： 5101520253035404550556065707580859095100 排序方式： 请选择题名升序题名降序提交时间升序提交时间降序作者升序作者降序发表日期升序发表日期降序 Optimus: An Operator Fusion Framework for Deep Neural Networks 期刊论文  OAI收割 ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2023, 卷号: 22, 期号: 1, 页码: 26 作者:  Cai, Xuyi;  Wang, Ying;  Zhang, Lei   |  收藏  |  浏览/下载：15/0  |  提交时间：2023/07/12 Neural network  embedded processor  memory  layer fusion   Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems 期刊论文  OAI收割 JOURNAL OF SYSTEMS ARCHITECTURE, 2022, 卷号: 128, 页码: 20 作者:  Choong, Benjamin Chen Ming;  Luo, Tao;  Liu, Cheng;  He, Bingsheng;  Zhang, Wei   |  收藏  |  浏览/下载：32/0  |  提交时间：2022/12/07 Artificial intelligence  Hardware-software co-design  Deep learning  Embedded systems  Emerging memory   SEE Sensitivity Evaluation for Commercial 16 nm SRAM-FPGA 期刊论文  OAI收割 ELECTRONICS, 2019, 卷号: 8, 期号: 12, 页码: 12 作者:  Cai, Chang;  Gao, Shuai;  Zhao, Peixiong;  Yu, Jian;  Zhao, Kai   |  收藏  |  浏览/下载：36/0  |  提交时间：2022/01/19 field-programmable gate arrays  embedded block memory  single event  fault tolerance  radiation effect   HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines 期刊论文  OAI收割 ACM SIGPLAN NOTICES, 2015, 卷号: 50, 期号: 7, 页码: 53-64 作者:  Wang, Zhe;  Li, Jianjun;  Wu, Chenggang;  Yang, Dongyan;  Wang, Zhenjiang   |  收藏  |  浏览/下载：23/0  |  提交时间：2019/12/13 Management  Measurement  Performance  Design  Experimentation  Security  memory virtualization  cross-ISA virtualization  Embedded Shadow Page Table  HSPT  Hosted Shadow Page Table  practical implementation  loadable kernel module  Security  Portability   Embedded image grabber and processing system based on camera link (EI CONFERENCE) 会议论文  OAI收割 2012 World Automation Congress, WAC 2012, June 24, 2012 - June 28, 2012, Puerto Vallarta, Mexico 作者:  Wang Z.;  Zhao Y.;  Zhao Y.;  Zhao Y.;  Wang Z. 收藏  |  浏览/下载：33/0  |  提交时间：2013/03/25 In order to realize real-time measurement based on image  proposes a design project of embedded image grabber and processing system based on camera link interface. The system adopts FPGA+DSP structure design. DSP used to process the image and send out processing results to external. FPGA adopts modularize design. It contains camera link interface module  image memory module  DSP connection module and so on. The experiment results show that the system design flexibility  small cubage  high real-time image processing  and can fulfil the requirement of real-time measurement. 2012 TSI Press.   基于半虚拟技术的嵌入式分区系统设计与实现 期刊论文  OAI收割 Computer Engineering and Design, 2012, 卷号: 33, 期号: 1, 页码: 132-137 李剑; 胡晓惠; 赵军锁 收藏  |  浏览/下载：32/0  |  提交时间：2012/11/12 RTEMS  partition system  para-virtualization  RTEMS  reliability  supervisor  embedded real-time operation-system  memory management   Image parallel processing based on GPU (EI CONFERENCE) 会议论文  OAI收割 2010 IEEE International Conference on Advanced Computer Control, ICACC 2010, March 27, 2010 - March 29, 2010, 445 Hoes Lane - P.O.Box 1331, Piscataway, NJ 08855-1331, United States 作者:  Wang J.-L.;  Wang J.-L. 收藏  |  浏览/下载：31/0  |  提交时间：2013/03/25 In order to solve the compute-intensive character of image processing  based on advantages of GPU parallel operation  parallel acceleration processing technique is proposed for image. First  efficient architecture of GPU is introduced that improves computational efficiency  comparing with CPU. Then  Sobel edge detector and homomorphic filtering  two representative image processing algorithms  are embedded into GPU to validate the technique. Finally  tested image data of different resolutions are used on CPU and GPU hardware platform to compare computational efficiency of GPU and CPU. Experimental results indicate that if data transfer time  between host memory and device memory  is taken into account  speed of the two algorithms implemented on GPU can be improved approximately 25 times and 49 times as fast as CPU  respectively  and GPU is practical for image processing. 2010 IEEE.   Design of image interpretation and data-processing system based on SOPC (EI CONFERENCE) 会议论文  OAI收割 2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China Wang Z.-Q.; Liu Z.-R.; Xie M.-J. 收藏  |  浏览/下载：13/0  |  提交时间：2013/03/25 In order to follow the development of image interpretation and data-processing system in photoelectric measurement equipments  a kind of hardware acceleration system is designed where MIMD distributed multi-processor architecture is used with SOPC technology. System hardware is composed of FPGA  SDRAM  SRAM  FLASH  and PCI bridge chip. Four Nios II embedded processors are integrated in a single FPGA chip  and communicate with each other by sharing memory. Experimental results indicate that the system meets the requirements of data-processing system in photoelectric measurement equipments and possesses practical significance for engineering applications. 2010 IEEE.   Real-time video compressing under DSP/BIOS (EI CONFERENCE) 会议论文  OAI收割 MIPPR 2009 - Medical Imaging, Parallel Processing of Images, and Optimization Techniques: 6th International Symposium on Multispectral Image Processing and Pattern Recognition, October 30, 2009 - November 1, 2009, Yichang, China Chen Q.-P.; Li G.-J. 收藏  |  浏览/下载：22/0  |  提交时间：2013/03/25 This paper presents real-time MPEG-4 Simple Profile video compressing based on the DSP processor. The programming framework of video compressing is constructed using TMS320C6416 Microprocessor  the architecture level optimizations are used to improve software pipeline. The system used DSP/BIOS to realize multi-thread scheduling. The whole system realizes high speed transition of a great deal of data. Experimental results show the encoder can realize real-time encoding of 768*576  TDS510 simulator and PC. It uses embedded real-time operating system DSP/BIOS and the API functions to build periodic function  25 frame/s video images. 2009 Copyright SPIE - The International Society for Optical Engineering.  tasks and interruptions etcs. Realize real-time video compressing. To the questions of data transferring among the system. Based on the architecture of the C64x DSP  utilized double buffer switched and EDMA data transfer controller to transit data from external memory to internal  and realize data transition and processing at the same time   同步数据流模型调度序列的空间优化 期刊论文  OAI收割 计算机工程与应用, 2009, 卷号: 45, 期号: 3, 页码: 198-201 刘国鑫; 谭国强; 贺也平   |  收藏  |  浏览/下载：22/0  |  提交时间：2010/08/23 嵌入式系统  同步数据流  调度序列  存储优化  反馈环 embedded system  Synchronous Data Flow（SDF）  scheduling sequence  memory optimization  feedback loop