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CAS IR Grid
机构
长春光学精密机械与物... [1]
数学与系统科学研究院 [1]
高能物理研究所 [1]
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OAI收割 [3]
内容类型
期刊论文 [2]
会议论文 [1]
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2016 [1]
2012 [1]
2009 [1]
学科主题
Physics [1]
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A Two-Stage Method to Identify Joint Modules From Matched MicroRNA and mRNA Expression Data
期刊论文
OAI收割
IEEE TRANSACTIONS ON NANOBIOSCIENCE, 2016, 卷号: 15, 期号: 4, 页码: 362-370
作者:
Min, Wenwen
;
Liu, Juan
;
Luo, Fei
;
Zhang, Shihua
  |  
收藏
  |  
浏览/下载:24/0
  |  
提交时间:2018/07/30
L-0-penalized singular value decomposition (L-0-SVD)
miRNA cluster
miRNA-gene joint module
multiple-output sparse group lasso
Electron performance measurements with the ATLAS detector using the 2010 LHC proton-proton collision data
期刊论文
OAI收割
EUROPEAN PHYSICAL JOURNAL C, 2012, 卷号: 72, 期号: 3
作者:
ATLAS collaboration
收藏
  |  
浏览/下载:18/0
  |  
提交时间:2015/12/02
ELECTROMAGNETIC CALORIMETER
MODULE-0
Storage and compression design of high speed CCD (EI CONFERENCE)
会议论文
OAI收割
4th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test and Measurement Technology and Equipment, November 19, 2008 - November 21, 2008, Chengdu, China
Cai X.
;
Zhai L. P.
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浏览/下载:57/0
  |  
提交时间:2013/03/25
In current field of CCD measurement
large area and high resolution CCD is used to obtain big measurement image
so that
speed and capacity of CCD requires high performance of later storage and process system. The paper discusses how to use SCSI hard disk to construct storage system and use DSPs and FPGA to realize image compression. As for storage subsystem
Because CCD is divided into multiplex output
SCSI array is used in RAID0 way. The storage system is composed of high speed buffer
DMA controller
control MCU
SCSI protocol controller and SCSI hard disk. As for compression subsystem
according to requirement of communication and monitor system
the output is fixed resolution image and analog PAL signal. The compression means is JPEG2000 standard
in which
9/7 wavelets in lifting format is used. 2 DSPs and FPGA are used to compose parallel compression system. The system is composed of FPGA pre-processing module
DSP compression module
video decoder module
data buffer module and communication module. Firstly
discrete wavelet transform and quantization is realized in FPGA. Secondly
entropy coding and stream adaption is realized in DSPs. Last
analog PAL signal is output by Video decoder. Data buffer is realized in synchronous dual-port RAM and state of subsystem is transfer to controller. Through subjective and objective evaluation
the storage and compression system satisfies the requirement of system. 2009 SPIE.