中国科学院机构知识库网格
Chinese Academy of Sciences Institutional Repositories Grid
机构
采集方式
内容类型
发表日期
学科主题
筛选

浏览/检索结果: 共45条,第1-10条 帮助

条数/页: 排序方式:
基于FPGA的IRIG-B标准DC code编码器VHDL设计 期刊论文  OAI收割
现代电子技术, 2013, 期号: 03, 页码: 119-121
王丽秋
收藏  |  浏览/下载:31/0  |  提交时间:2014/03/07
IRIGB  DC code  FPGA  VHDL  
LABTM control system based on FPGA (EI CONFERENCE) 会议论文  OAI收割
2nd International Conference on Mechatronics and Applied Mechanics, ICMAM 2012, December 8, 2012 - December 9, 2012, Taiwan
作者:  
Wang Y.;  Yu P.;  Yu P.;  Wang Y.;  Wang Y.
收藏  |  浏览/下载:151/0  |  提交时间:2013/03/25
This paper presents the digital PI control method for design and simulation of a high precision limited angle brushless torque motor control system in Field Programmable Gate Array device (FPGA). The direct drive structures which are widely applied in many servo control fields. Matlab Xilinx System GeneratorR toolbox based on Fixed-Point Arithmetic is used to design the digital PI controller using DSP architecture  plot the responses of the control system and generate the VHDL source code. The control system model consists of a digital PI  a real LABTM  and a real absolute Inductosyn  encoder to rpm and position blocks. Through loading generated codes in process of the simulation that built by the digital discrete model  it is verified that the rising time of current loop is only 1.2ms  and rate loop is 8ms  overshoot is rarely 4.2%. Finally  the comprehensive positioning accuracy of system can reach up to 5 arc sec  and the rate jitter achieves 5% with the 4 arc sec accuracy absolute Inductosyn. (2013) Trans Tech Publications  Switzerland.  
带同步端可变脉宽通用偶数分频器的VHDL设计 期刊论文  OAI收割
电子世界, 2012, 期号: 21, 页码: 124+126
王丽秋
收藏  |  浏览/下载:21/0  |  提交时间:2013/03/11
FPGA与DSP在二维FFT变换应用中的对比研究 期刊论文  OAI收割
现代电子技术, 2012, 卷号: 35, 期号: 20, 页码: 80-83+86
作者:  
收藏  |  浏览/下载:32/0  |  提交时间:2016/04/06
二维FFT  FPGA  VHDL  DSP  
任意形状脉冲信号发生器的研制 学位论文  OAI收割
硕士: 中国科学院研究生院, 2011
江家友
收藏  |  浏览/下载:36/0  |  提交时间:2012/08/15
A new approach to realize UART (EI CONFERENCE) 会议论文  OAI收割
2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China
作者:  
Wang Y.;  Wang Y.;  Wang Y.;  Wang Y.;  Wang Y.
收藏  |  浏览/下载:33/0  |  提交时间:2013/03/25
In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol  a method to implement UART communications based on programmable logic device is proposed in the paper. In the proposed method  the core function of UART is integrated in CPLD with VHDL. Firstly  UART data frame format and operational principle of UART were introduced after reviewing some methods to realize UART. The methods to implement UART transmitter  UART receiver and baudrate generator using VHDL were illustrated in detail. Then pre-simulation and synthesize of VHDL program were executed. Finally  the test with bit error rate was carried out on physical system. Experimental results indicate that 75 percent of the GLB are used by UART  and the bit error rate is less than 109. The experiment was implemented utilizing the RS-422 protocol and the baudrate is 62.5kb/s. The proposed method can satisfy the system requirements of high integration  stabilization  low bit error rate  strong anti-jamming and low cost. 2011 IEEE.  
Improved algorithm of LED display image based on composed correction (EI CONFERENCE) 会议论文  OAI收割
International Conference on Advances in Computer Science, Environment, Ecoinformatics, and Education, CSEE 2011, August 21, 2011 - August 22, 2011, Wuhan, China
Song X.-J.; Ma X.-Q.; Liu W.-Y.; Zheng X.-F.
收藏  |  浏览/下载:16/0  |  提交时间:2013/03/25
新型多道高精度的时间一电压转换电路系统的设计 期刊论文  OAI收割
核电子学与探测技术;Nuclear Electronics & Detection Technology, 2010, 卷号: 30, 期号: 5, 页码: 1681-1685
吴鸣; 苏弘; 马晓莉; 孔洁
  |  收藏  |  浏览/下载:15/0  |  提交时间:2011/05/16
Timing generator of scientific grade CCD camera and its implementation based on FPGA technology (EI CONFERENCE) 会议论文  OAI收割
5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Detector, Imager, Display, and Energy Conversion Technology, April 26, 2010 - April 29, 2010, Dalian, China
作者:  
Li Y.;  Li Y.;  Li Y.;  Li Y.
收藏  |  浏览/下载:30/0  |  提交时间:2013/03/25
The Timing Generator's functions of Scientific Grade CCD Camera is briefly presented: it generates various kinds of impulse sequence for the TDI-CCD  video processor and imaging data output  acting as the synchronous coordinator for time in the CCD imaging unit. The IL-E2TDI-CCD sensor produced by DALSA Co.Ltd. use in the Scientific Grade CCD Camera. Driving schedules of IL-E2 TDI-CCD sensor has been examined in detail  the timing generator has been designed for Scientific Grade CCD Camera. FPGA is chosen as the hardware design platform  schedule generator is described with VHDL. The designed generator has been successfully fulfilled function simulation with EDA software and fitted into XC2VP20-FF1152 (a kind of FPGA products made by XILINX). The experiments indicate that the new method improves the integrated level of the system. The Scientific Grade CCD camera system's high reliability  stability and low power supply are achieved. At the same time  the period of design and experiment is sharply shorted. 2010 Copyright SPIE - The International Society for Optical Engineering.  
OFDM baseband modulation technology based on VHDL (EI CONFERENCE) 会议论文  OAI收割
2010 IEEE International Conference on Advanced Computer Control, ICACC 2010, March 27, 2010 - March 29, 2010, 445 Hoes Lane - P.O.Box 1331, Piscataway, NJ 08855-1331, United States
Lin L.; Qiao Y.-F.; Su W.-X.
收藏  |  浏览/下载:15/0  |  提交时间:2013/03/25
In order to improve the transmission velocity in mulitipath fading wireless channel  two main advantages are obtained via discussing spectrum utilization ratio of OFDM. Then  the high speed OFDM technology receives increasing attentions in mobile communication. Modulation programs are designed with VHDL based on the principle of OFDM in the paper. First  from the results of VHDL simulation  after OFDM fundamental is introduced  the realization of baseband operations  such as interleaver  subcarrier modulation  IFFT and adding CP  are presented. Finally  implemented programs are validated on the actual implement system. Experimental results indicate that setup time corresponding to transmission velocity is only 71.05s and steady time is approximately 6 times as setup time  that is  not only achieving the high speed transmission  but also supplying adequate modulation time. 2010 IEEE.