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Design of image interpretation and data-processing system based on SOPC (EI CONFERENCE) 会议论文 OAI收割
2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China
Wang Z.-Q.; Liu Z.-R.; Xie M.-J.

收藏 | 浏览/下载：14/0 | 提交时间：2013/03/25

In order to follow the development of image interpretation and data-processing system in photoelectric measurement equipments a kind of hardware acceleration system is designed where MIMD distributed multi-processor architecture is used with SOPC technology. System hardware is composed of FPGA SDRAM SRAM FLASH and PCI bridge chip. Four Nios II embedded processors are integrated in a single FPGA chip and communicate with each other by sharing memory. Experimental results indicate that the system meets the requirements of data-processing system in photoelectric measurement equipments and possesses practical significance for engineering applications. 2010 IEEE.