中国科学院机构知识库网格系统: 检索

Phosphonated conjugated polymers for polymer solar cells with a non-halogenated solvent process 期刊论文 OAI收割
polymer chemistry, 2015, 卷号: 6, 期号: 5, 页码: 805-812
作者: Meng,Bin; Fu,Yingying; Xie,Zhiyuan; Liu,Jun; Wang,Lixiang

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POWER CONVERSION EFFICIENCY LOW-BANDGAP POLYMER HIGH-PERFORMANCE SIDE-CHAINS MORPHOLOGY BENZOTHIADIAZOLE POLYFLUORENE COPOLYMERS DESIGN TANDEM

The study of heart monitor based Atmega128L (EI CONFERENCE) 会议论文 OAI收割
2nd World Congress on Computer Science and Information Engineering, CSIE 2011, June 17, 2011 - June 19, 2011, Changchun, China
作者: Chen J.; Zhang Y.

收藏 | 浏览/下载：30/0 | 提交时间：2013/03/25

This paper introduces a realtime system which can acquire process store and display heart sounds and electrocardiogram(ECG) of the human body at the same time. It is composed of superior microprocessor-Atmega128L large capacity Flash and the new type LCD. All hardwares adopt low power design and surface mounting package. The system do not affect the daily living and working of human being when it is used so it is suited for clinical and family monitoring. Springer-Verlag Berlin Heidelberg 2012.

Physical Implementation of the Eight-Core Godson-3B Microprocessor 期刊论文 OAI收割
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2011, 卷号: 26, 期号: 3, 页码: 520-527
作者: Wang, Ru; Fan, Bao-Xia; Yang, Liang; Gao, Yan-Ping; Liu, Dong

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收藏 | 浏览/下载：24/0 | 提交时间：2019/12/16

physical implementation hierarchical design flow GALS clock mesh low power

Scan chain design for shift power reduction in scan-based testing 期刊论文 OAI收割
SCIENCE CHINA-INFORMATION SCIENCES, 2011, 卷号: 54, 期号: 4, 页码: 767-777
作者: Li Jia; Hu Yu; Li XiaoWei

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收藏 | 浏览/下载：23/0 | 提交时间：2019/12/16

low power DfT scan-based testing test power reduction scan chain design

Design for Testability Features of Godson-3 Multicore Microprocessor 期刊论文 OAI收割
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2011, 卷号: 26, 期号: 2, 页码: 302-313
作者: Qi, Zi-Chu; Liu, Hui; Li, Xiang-Ku; Hu, Wei-Wu

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收藏 | 浏览/下载：32/0 | 提交时间：2019/12/16

DFT (design for testability) TAM (test access mechanism) multicore processor low power test

Laser pulse coded signal frequency measuring device based on DSP and CPLD (EI CONFERENCE) 会议论文 OAI收割
International Symposium on Photoelectronic Detection and Imaging 2011: Laser Sensing and Imaging; and Biological and Medical Applications of Photonics Sensing and Imaging, May 24, 2011 - May 26, 2011, Beijing, China
作者: Zhang H.-B.; Wang T.-F.; Guo R.-H.; Li Y.; Li Y.

收藏 | 浏览/下载：48/0 | 提交时间：2013/03/25

Laser pulse code is an anti-jamming measures used in semi-active laser guided weapons. On account of the laser-guided signals adopting pulse coding mode and the weak signal processing it need complex calculations in the frequency measurement process according to the laser pulse code signal time correlation to meet the request in optoelectronic countermeasures in semi-active laser guided weapons. To ensure accurately completing frequency measurement in a short time it needed to carry out self-related process with the pulse arrival time series composed of pulse arrival time calculate the signal repetition period and then identify the letter type to achieve signal decoding from determining the time value number and rank number in a signal cycle by Using CPLD and DSP for signal processing chip designing a laser-guided signal frequency measurement in the pulse frequency measurement device improving the signal processing capability through the appropriate software algorithms. In this article we introduced the principle of frequency measurement of the device described the hardware components of the device the system works and software analyzed the impact of some system factors on the accuracy of the measurement. The experimental results indicated that this system improve the accuracy of the measurement under the premise of volume real-time anti-interference low power of the laser pulse frequency measuring device. The practicality of the design reliability has been demonstrated from the experimental point of view.

Graded index profiles and loss-induced single-mode characteristics in vertical-cavity surface-emitting lasers with petal-shape holey structure 期刊论文 OAI收割
chinese physics b, 2011, 卷号: 20, 期号: 2, 页码: article no.24204
作者: Jiang B

收藏 | 浏览/下载：78/7 | 提交时间：2011/07/06

vertical-cavity surface-emitting lasers single mode low divergence angle graded index profile OPTICAL INTERCONNECTS QUANTUM-DOT WAVE-GUIDE VCSELS POWER FIELD OPERATION OXIDATION DESIGN FIBERS

Physical implementation of the 1ghz godson-3 quad-core microprocessor 期刊论文 iSwitch采集
Journal of computer science and technology, 2010, 卷号: 25, 期号: 2, 页码: 192-199
作者: Fan, Bao-Xia; Yang, Liang; Wang, Jiang-Mei; Wang, Ru; Xiao, Bin

收藏 | 浏览/下载：23/0 | 提交时间：2019/05/10

Physical implementation Design methodology On-chip variation (ocv) Low power Clock tree

Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor 期刊论文 OAI收割
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2010, 卷号: 25, 期号: 2, 页码: 192-199
作者: Fan, Bao-Xia; Yang, Liang; Wang, Jiang-Mei; Wang, Ru; Xiao, Bin

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收藏 | 浏览/下载：12/0 | 提交时间：2019/12/16

physical implementation design methodology on-chip variation (OCV) low power clock tree

Design of driving circuit for binocular CCD image system (EI CONFERENCE) 会议论文 OAI收割
5th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Detector, Imager, Display, and Energy Conversion Technology, April 26, 2010 - April 29, 2010, Dalian, China
作者: Zhang X.; Zhang X.; Zhang X.

收藏 | 浏览/下载：49/0 | 提交时间：2013/03/25

The paper designs a driving circuit of high sensitive wide dynamic and high signal-to-noise ratio for binocular CCD imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Inner structure and driving timing of the FTF5066M sensor are presented. Field Programmable Gate Array (FPGA) is used as the main device to accomplish the timing design of the circuits and power driver control of the two sensors. By using the Correlated Double Sampling (CDS) technique the video noise is reduced and the SNR of the system is increased. A 12- bit A/D converter is used to improve the image quality. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel. For its good performance low power consumption and small volume the driving system can be applied to aeronautics and astronautics field. With a further improvement a maximum data output rate of 2.7 frames per second can be reached through all the eight channels of the two CCDs. 2010 Copyright SPIE - The International Society for Optical Engineering.