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浏览/检索结果: 共6条,第1-6条 帮助

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An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating 期刊论文  OAI收割
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2024, 卷号: 43, 期号: 6, 页码: 1781-1793
作者:  
Chen, Mingkai;  Liu, Cheng;  Liang, Shengwen;  He, Lei;  Wang, Ying
  |  收藏  |  浏览/下载:5/0  |  提交时间:2024/12/06
Search-Free Inference Acceleration for Sparse Convolutional Neural Networks 期刊论文  OAI收割
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 7, 页码: 2156-2169
作者:  
Liu, Bosheng;  Chen, Xiaoming;  Han, Yinhe;  Wu, Jigang;  Chang, Liang
  |  收藏  |  浏览/下载:26/0  |  提交时间:2023/01/10
High-Performance Motion Estimation for Image Sensors with Video Compression 期刊论文  OAI收割
SENSORS, 2015, 卷号: 15, 期号: 8, 页码: 20752-20778
作者:  
Xu, Weizhi;  Yin, Shouyi;  Liu, Leibo;  Liu, Zhiyong;  Wei, Shaojun
  |  收藏  |  浏览/下载:114/0  |  提交时间:2019/12/13
Memory bandwidth optimization of SpMV on GPGPUs 期刊论文  OAI收割
FRONTIERS OF COMPUTER SCIENCE, 2015, 卷号: 9, 期号: 3, 页码: 431-441
作者:  
Yan, Chenggang Clarence;  Yu, Hui;  Xu, Weizhi;  Zhang, Yingping;  Chen, Bochuan
  |  收藏  |  浏览/下载:30/0  |  提交时间:2019/12/13
High bandwidth memory interface design based on DDR3 SDRAM and FPGA 会议论文  OAI收割
12th International SoC Design Conference (ISOCC 2015), Gyeongju, South Korea, November 2-5, 2015
作者:  
Wang BP(王宝坡);  Du JS(杜劲松);  Bi X(毕欣);  Tian X(田星)
收藏  |  浏览/下载:42/0  |  提交时间:2015/12/19
SoC test data compression technique based on RLE-G (EI CONFERENCE) 会议论文  OAI收割
2010 International Conference on Advanced Measurement and Test, AMT 2010, May 15, 2010 - May 16, 2010, Sanya, China
作者:  
Liu W.;  Yang L.;  Yang L.;  Zheng X.
收藏  |  浏览/下载:32/0  |  提交时间:2013/03/25
Test data compression has been an effective way to reduce test data volume and test time  as well as to solve automatic test equipment (ATE) memory and bandwidth limitation. We analyze the limitations of current test data compression algorithm and draw on the previous experience to deduce an optimal compression coding model suitable for SoC test data. In addition  in this paper we make full use of the relevance of the test vectors and the advantages of statistical coding to present an efficient test data compression method RLE-G based on the coding model  and give the RLE-G the optimal compression efficiency of the boundary conditions and realization steps. The experimental results for ISCAS 89 benchmark circuits demonstrate RLE-G have the excellent advantages of high compression ratio. (2010) Trans Tech Publications.